Low-temperature formation of layers of polycrystalline...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor

Reexamination Certificate

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C438S488000, C257S065000, C257SE21097, C257SE21316

Reexamination Certificate

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07964479

ABSTRACT:
The present invention provides a method for forming a layer (6) of polycrystalline semiconductor material on a substrate (1). The method comprises providing at least one catalyst particle (4) on a substrate (1), the at least one catalyst particle (4) comprising at least a catalyst material, the catalyst material having a melt temperature of between room temperature and 500° C., or being able to form a catalyst material/semiconductor material alloy with a eutectic temperature of between room temperature and 500° C., and forming a layer (6) of polycrystalline semiconductor material on the substrate (1) at temperatures lower than 500° C. by using plasma enhancement of a precursor gas, thereby using the at least one catalyst particle (4) as an initiator. The present invention furthermore provides a layer (6) of polycrystalline semiconductor material obtained by the method according to embodiments of the present invention.

REFERENCES:
patent: 2007/0003467 (2007-01-01), Sunkara et al.
Iacopi et al, Plasma-enhanced chemical vapour deposition growth of Si nanowires with low melting point metal catalysts: an effective alternative to Au-mediated growth, 2007, Nanotechnology, vol. 18.
Ferro et al, “VLS growth of SiC epilayers”, Research Signpost, Trivandrum, India, ISBN 81-308-0092-6 (2006).
Kim et al., “Ultra-low temperature poly-Si thin film transistor for plastic substrate”, Journal of the Korean Physical Society, vol. 48, pp. S6-S63 (2006).
Sharma et al., “Direct synthesis of single-crystalline silicon nanowires using molten gallium and silane plasma; Direct synthesis of single-crystalline silicon nanowires”, Nanotechnology, IOP, Bristol, GB, vol. 15, No. 1, pp. 130-134 (Jan. 1, 2004).
Sunkara et al., “Bulk synthesis of silicon nanowires using a low-temperature vapor-liquid-solid method”, Applied Physics Letters, vol. 79, No. 10, pp. 1546-1548 (Sep. 3, 2001).

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