Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1996-07-17
1998-09-01
Wilczewski, Mary
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438947, H01L 2128
Patent
active
058010882
ABSTRACT:
A method of forming a gate electrode for an insulated-gate field-effect transistor (IGFET) is disclosed. The method includes forming a gate material for providing a gate electrode over a semiconductor substrate, forming a first mask over the gate material wherein the first mask includes an opening that defines a first edge of the gate electrode, removing a first portion of the gate material to form the first edge of the gate electrode as defined by the first mask, forming a second mask over the gate material after removing the first mask wherein the second mask includes an opening that defines a second edge of the gate electrode, removing a second portion of the gate material to form the second edge of the gate electrode as defined by the second mask, and removing the second mask. Thus, the gate electrode is defined by a lateral displacement between the openings in the first and second masks. Preferably, the first and second masks are photoresist, and the length between the first and second edges of the gate electrode is less than the minimum resolution of a photolithographic system used to pattern the masks.
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M. Ono et al., "A 40 nm Gate Length n-MOSFET," IEEE Transactions on Electron Devices, vol. 42, No. 10, (1995), pp. 1822-1830.
Fulford Jr. H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Sigmond David M.
Wilczewski Mary
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