Memory array with a pair of memory-cell strings to a single...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29131

Reexamination Certificate

active

07906818

ABSTRACT:
Memory arrays and methods of forming memory arrays are disclosed. One such memory array has a first string of serially-coupled first memory cells and a second string of serially-coupled second memory cells sharing a single conductive pillar which forms a channel for both strings of serially-coupled memory cells. For example, a first memory cell can have a first control gate on the first side of the conductive pillar and a first charge trap interposed between the first side of the conductive pillar and the first control gate. A second memory cell can have a second control gate on the second side of the conductive pillar and a second charge trap interposed between the second side of the conductive pillar and the second control gate. The first and second charge traps are electrically isolated from each other and the first and second control gates can be electrically isolated from each other.

REFERENCES:
patent: 2004/0206996 (2004-10-01), Lee et al.
patent: 2005/0133851 (2005-06-01), Forbes
patent: 2008/0179659 (2008-07-01), Enda et al.

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