Memory repair

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S005110

Reexamination Certificate

active

08010847

ABSTRACT:
A memory chip having a memory with a plurality of non-redundant memory lines and a plurality of redundant memory lines, and a controller configured to allocate dynamically a redundant memory line to a failed memory line during runtime.

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