Semiconductor memory device, method of operating...

Details Semiconductor memory device, method of operating... Semiconductor memory device, method of operating...

2011-08-09

2011-08-09

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S189011

Reexamination Certificate

active

07995414

ABSTRACT:
A semiconductor memory device is provided which comprises: a sense amplifier; and a bit line, wherein the disconnection of the sense amplifier from the bit line is performed in a data read operation when temperature in the semiconductor memory device is at a first temperature, and wherein the disconnection of the sense amplifier from the bit line is not performed in the data read operation when the temperature in the semiconductor memory device is at a second temperature.

REFERENCES:
patent: 7257028 (2007-08-01), Lee et al.
patent: 2007/0091703 (2007-04-01), Nishimura et al.
patent: 2008/0001615 (2008-01-01), Lim et al.
patent: 2008/0037338 (2008-02-01), Chen et al.
patent: 02-146178 (1990-06-01), None
patent: 2002-313099 (2002-10-01), None
patent: WO 2005/124786 (2005-12-01), None

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