Analog access circuit for validating chalcogenide memory cells

Details Analog access circuit for validating chalcogenide memory cells Analog access circuit for validating chalcogenide memory cells

2011-07-26

2011-07-26

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S189150, C365S151000

Reexamination Certificate

active

07986550

ABSTRACT:
An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.

REFERENCES:
patent: 6466498 (2002-10-01), Hogan
patent: 7471552 (2008-12-01), Parkinson et al.
patent: 2005/0030788 (2005-02-01), Parkinson et al.

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