Semiconductor memory device and method for manufacturing the...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S330000, C257S396000, C257SE21656, C257SE21659, C438S259000, C438S266000, C438S270000, C438S589000

Reexamination Certificate

active

07928504

ABSTRACT:
A semiconductor memory device and a method for manufacturing the same are disclosed, which reduce parasitic capacitance generated between a storage node contact and a bit line of a high-integration semiconductor device. A method for manufacturing a semiconductor memory device includes forming a buried word line in an active region of a cell region, forming an insulation layer in the cell region and a lower electrode layer of a gate in a peripheral region so that a height of the insulation layer is substantially equal to that of the lower electrode layer, and providing a first conductive layer over the cell region and the peripheral region to form a bit line layer and an upper electrode layer.

REFERENCES:
patent: 7595262 (2009-09-01), Schlosser

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