Semiconductor device and method for manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S411000, C257SE29309, C257SE21423, C438S287000, C438S288000, C438S296000, C438S424000

Reexamination Certificate

active

07960799

ABSTRACT:
A charge trap type non-volatile memory device has memory cells formed on a silicon substrate at a predetermined interval via an element isolation trench along a first direction in which word lines extend. Each of the memory cells has a tunnel insulating film formed on the silicon substrate, a charge film formed on the tunnel insulating film, and a common block film formed on the charge film. The common block film is formed in common with the memory cells along first direction. An element isolation insulating film buried in the element isolation trench has an upper portion of a side wall of the element isolation insulating film which contacts with a side wall of the charge film in each of the memory cells and a top portion of the element isolation insulating film which contacts with the common block film. A control electrode film is formed on the common block film.

REFERENCES:
patent: 6995424 (2006-02-01), Lee
patent: 7081386 (2006-07-01), Ozawa et al.
patent: 7498217 (2009-03-01), Oh et al.
patent: 7645668 (2010-01-01), Kim et al.
patent: 7816726 (2010-10-01), He et al.
patent: 2006/0043456 (2006-03-01), Derderian et al.
patent: 2007/0126054 (2007-06-01), Jung
patent: 2008/0230830 (2008-09-01), Kim et al.
patent: 2009/0053871 (2009-02-01), Ahn
patent: 2009/0212347 (2009-08-01), Goarin et al.
patent: 2009/0251972 (2009-10-01), He et al.
patent: 2007-142468 (2007-06-01), None

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