Memory protection for embedded controllers

Details Memory protection for embedded controllers Memory protection for embedded controllers

2011-03-29

2011-03-29

Patel, Kaushikkumar (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711SE12091, C713S002000, C713S193000

Reexamination Certificate

active

07917716

ABSTRACT:
System and method for protecting data in a system including a main processor, an embedded controller, and a memory. In response to a power-on-reset (POR), access to the memory is enabled, e.g., access by the embedded controller. First data is read from the memory (e.g., by the embedded controller) in response to the enabling, where the first data are usable to perform security operations for the system prior to boot-up of the main processor. The first data are used, e.g., by the embedded controller, to perform one or more security operations for the system, then access to the memory, e.g., by the embedded controller, is disabled, where after the disabling the memory is not accessible, e.g., until the next POR initiates enablement.

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Machine translation of JP 09054725A, 6 pages, published 1997.

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