Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2011-07-19
2011-07-19
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S226000, C365S233500, C365S233100
Reexamination Certificate
active
07983099
ABSTRACT:
A dual function memory device architecture compatible with asynchronous operation and synchronous serial operation. The dual function memory device architecture includes one set of physical ports having two different functional assignments. Coupled between the physical ports and core circuits of the memory device are asynchronous and synchronous input and output signal paths or circuits. The signal paths include shared or dedicated buffers coupled to the ports, asynchronous and synchronous command decoders, a network of switches, and a mode detector. The mode detector determines the operating mode of the dual function memory device from a port, and provides the appropriate switch selection signal. The network of switches routes the input or output signals through the asynchronous or synchronous circuits in response to the switch selection signal. The appropriate command decoder interprets the input signals and provides common control logic with the necessary signals for initiating the corresponding operation.
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Borden Ladner Gervais LLP
Hung Shin
Lam David
Mosaid Technologies Incorporated
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