Dual-mode memory chip for high capacity memory subsystem

Details Dual-mode memory chip for high capacity memory subsystem Dual-mode memory chip for high capacity memory subsystem

2011-04-05

2011-04-05

Doan, Duc T (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

07921264

ABSTRACT:
A dual-mode memory chip supports a first operation mode in which received data access commands contain chip select data to identify the chip addressed by the command, and control logic in the memory chip determines whether the command is addressed to the chip, and a second operation mode in which the received data access command addresses a set of multiple chips. Preferably, the first mode supports a daisy-chained configuration of memory chips. Preferably the second mode supports a hierarchical interleaved memory subsystem, in which each addressable set of chips is configured as a tree, command and write data being propagated down the tree, the number of chips increasing at each succeeding level of the tree.

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