Method for fabricating a sealed cavity microstructure

Details Method for fabricating a sealed cavity microstructure Method for fabricating a sealed cavity microstructure

2011-01-04

2011-01-04

Zarneke, David A (Department: 2891)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Packaging or treatment of packaged semiconductor

C438S051000, C438S055000, C438S064000, C257SE31110

Reexamination Certificate

active

07863063

ABSTRACT:
A method for fabricating a sealed cavity microstructure comprises the steps of: forming an insulation layer with a micro-electro-mechanical structure on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one suspended structure and at least one conductive structure between which is disposed a spacer region; after an etching, filling a sacrificial layer into the spacer region and on the surface of the conductive structure; forming holes in the sacrificial layer correspondingly to the conductive structure; depositing a cap layer into the holes and the surface; after removing the sacrificial layer, utilizing the clearance of the cap layer to carry out a further etching to realize the suspension of the micro-electro-mechanical structure; and finally, utilizing a sealing layer to achieve the sealing effect. By such arrangements, the exposure of the micro-electro-mechanical structure can be effectively prevented, and the final package cost can be reduced.

REFERENCES:
patent: 7736929 (2010-06-01), Monadgemi et al.
patent: 2005/0260783 (2005-11-01), Lutz et al.
patent: 2007/0287215 (2007-12-01), Utsumi et al.
patent: 2009/0061578 (2009-03-01), Tan et al.
patent: 2009/0108381 (2009-04-01), Buchwalter et al.
patent: 2009/0230499 (2009-09-01), Warsop et al.
patent: 2009/0243084 (2009-10-01), Tan
patent: 2010/0022046 (2010-01-01), Utsumi et al.

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