Method and structure for relieving transistor performance...

Details Method and structure for relieving transistor performance... Method and structure for relieving transistor performance...

2011-01-18

2011-01-18

Luu, Chuong A. (Department: 2892)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S427000, C438S297000, C438S404000

Reexamination Certificate

active

07871895

ABSTRACT:
A method of forming shallow trench isolation (STI) regions for semiconductor devices, the method including defining STI trench openings within a semiconductor substrate; filling the STI trench openings with an initial trench fill material; defining a pattern of nano-scale openings over the substrate, at locations corresponding to the STI trench openings; transferring the pattern of nano-scale openings into the trench fill material so as to define a plurality of vertically oriented nano-scale openings in the trench fill material; and plugging upper portions of the nano-scale openings with additional trench fill material, thereby defining porous STI regions in the substrate.

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