Method of fabricating an integrated circuit having a...

Details Method of fabricating an integrated circuit having a... Method of fabricating an integrated circuit having a...

2011-08-30

2011-08-30

Chambliss, Alonzo (Department: 2892)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S623000, C438S629000, C257S620000, C257S700000, C257S758000

Reexamination Certificate

active

08008127

ABSTRACT:
A plurality of IC regions are formed on a semiconductor wafer, which is cut into individual chips incorporating ICs, wherein wiring layers and insulating layers are sequentially formed on a silicon substrate. In order to reduce height differences between ICs and scribing lines, a planar insulating layer is formed to cover the overall surface with respect to ICs, seal rings, and scribing lines. In order to avoid occurrence of breaks and failures in ICs, openings are formed to partially etch insulating layers in a step-like manner so that walls thereof are each slanted by prescribed angles ranging from 20° to 80°. For example, a first opening is formed with respect to a thin-film element section, and a second opening is formed with respect to an external-terminal connection pad.

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