Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-06-07
2011-06-07
Nhu, David (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S301000, C257S306000, C257S310000, C257SE21545, C257SE21645, C257SE21646
Reexamination Certificate
active
07956396
ABSTRACT:
A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.
REFERENCES:
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 4818725 (1989-04-01), Lichtel, Jr. et al.
patent: 4833094 (1989-05-01), Kenney
patent: 4997781 (1991-03-01), Tigelaar
patent: 5032881 (1991-07-01), Sardo et al.
patent: 5047362 (1991-09-01), Bergemont
patent: 5196353 (1993-03-01), Sandhu et al.
patent: 5235200 (1993-08-01), Komori et al.
patent: 5270234 (1993-12-01), Huang et al.
patent: 5279234 (1994-01-01), Bender et al.
patent: 5290721 (1994-03-01), Yoshimi et al.
patent: 5292673 (1994-03-01), Shinriki et al.
patent: 5315142 (1994-05-01), Acovic et al.
patent: 5372962 (1994-12-01), Hirota et al.
patent: 5407534 (1995-04-01), Thakur
patent: 5451803 (1995-09-01), Oji et al.
patent: 5521108 (1996-05-01), Rostoker et al.
patent: 5616513 (1997-04-01), Shepard
patent: 5633185 (1997-05-01), Yiu et al.
patent: 5680345 (1997-10-01), Hsu et al.
patent: 5705415 (1998-01-01), Orlowski et al.
patent: 5707897 (1998-01-01), Lee et al.
patent: 5712179 (1998-01-01), Yuan
patent: 5729043 (1998-03-01), Shepard
patent: 5733383 (1998-03-01), Fazan et al.
patent: 5741740 (1998-04-01), Jang et al.
patent: 5753561 (1998-05-01), Lee et al.
patent: 5763309 (1998-06-01), Chang
patent: 5763315 (1998-06-01), Benedict et al.
patent: 5763932 (1998-06-01), Pan et al.
patent: 5767005 (1998-06-01), Doan et al.
patent: 5892257 (1999-04-01), Acocella et al.
patent: 6008112 (1999-12-01), Acocella et al.
patent: 6054733 (2000-04-01), Doan et al.
patent: 6271561 (2001-08-01), Doan
patent: 6281103 (2001-08-01), Doan et al.
patent: 6420249 (2002-07-01), Doan et al.
patent: 6780740 (2004-08-01), Doan et al.
patent: 6914310 (2005-07-01), Doan et al.
patent: 7049238 (2006-05-01), Doan et al.
patent: 7323739 (2008-01-01), Doan et al.
patent: 2006/0115987 (2006-06-01), Doan et al.
William J. Patrick et al., “Application of Chemical Polishing to the Fabricating of VLSI Circuit Interconnections”, J. Electrochemical Society, vol. 138, No. 6, Jun. 1991, pp. 1778-1784.
Kaufman, F. B., et al., “Chemical-Mechanical Polishing for Fabricating Patterned W Metal Features as Chip Interconnects”, J. Electrochem Soc., vol. 138, No. 11, Nov. 1991, pp. 3460-3465.
Micron Quantum Devices, “Booth Block Flash Memory”, technical brochure, 1997.
Doan Trung Tri
Lowrey Tyler A.
Lerner David Littenberg Krumholz & Mentlik LLP
Nhu David
Round Rock Research, LLC
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