Single poly type EEPROM and method for manufacturing the EEPROM

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S319000, C257SE29300, C257SE21422, C257SE21008, C257SE21409, C438S283000, C438S381000, C438S585000

Reexamination Certificate

active

08004034

ABSTRACT:
Embodiments relate to a single poly type EEPROM and a method for manufacturing an EEPROM. According to embodiments, a single poly type EEPROM may include unit cells. A unit cell may include a floating gate at a side of a control node formed on and/or over a semiconductor substrate having an activation region and a device isolation area, not overlapping a device isolation region but overlapping only a top of the activation region. A select gate may be formed on and/or over a top of the activation region. According to embodiments, a ratio of a capacitance of a control node side to a capacitance of a bit line side may increase, which may improve a coupling ratio. According to embodiments, a junction capacitance may be maximized by not doping the floating gate with an impurity, which may allow for a reduction in chip size by securing design margins.

REFERENCES:
patent: 6842372 (2005-01-01), Hu
patent: 2005/0006697 (2005-01-01), Hsieh
patent: 2006/0203552 (2006-09-01), Chen et al.
patent: 1380699 (2002-11-01), None
patent: 1681128 (2005-10-01), None

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