Methods for scalably exploiting parallelism in a parallel...

Details Methods for scalably exploiting parallelism in a parallel... Methods for scalably exploiting parallelism in a parallel...

2011-05-03

2011-05-03

Kindred, Alford W (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

C712S022000

Reexamination Certificate

active

07937567

ABSTRACT:
Parallelism in a parallel processing subsystem is exploited in a scalable manner. A problem to be solved can be hierarchically decomposed into at least two levels of sub-problems. Individual threads of program execution are defined to solve the lowest-level sub-problems. The threads are grouped into one or more thread arrays, each of which solves a higher-level sub-problem. The thread arrays are executable by processing cores, each of which can execute at least one thread array at a time. Thread arrays can be grouped into grids of independent thread arrays, which solve still higher-level sub-problems or an entire problem. Thread arrays within a grid, or entire grids, can be distributed across all of the available processing cores as available in a particular system implementation.

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Marr et al. “Hyper-Threading Technology Architecture and Microarchitecture”,. Intel Technology Journal, vol. 06 Issue 01 Published Feb. 14, 2002.

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