Translation lookaside buffer prediction mechanism

Details Translation lookaside buffer prediction mechanism Translation lookaside buffer prediction mechanism

2011-07-26

2011-07-26

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

Reexamination Certificate

active

07987337

ABSTRACT:
A memory management unit includes a translation lookaside buffer including a page table. The page table includes M entries where M is an integer greater than zero. A register interface selects one of the M entries. The translation lookaside buffer calculates an effective address based on the selected one of the M entries while at least one of mapping the selected one of the M entries to an index and selecting a set of the M entries based on a control signal.

REFERENCES:
patent: 5335333 (1994-08-01), Hinton et al.
patent: 5392410 (1995-02-01), Liu
patent: 5893930 (1999-04-01), Song
patent: 7162609 (2007-01-01), Morrow et al.
patent: 7434027 (2008-10-01), Morrow et al.

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