Process for forming a wire portion in an integrated...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate

Reexamination Certificate

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Details

C257SE21090, C438S479000, C438S492000, C438S494000, C977S762000

Reexamination Certificate

active

07960255

ABSTRACT:
A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion (11, 12). Cross-sectional dimensions of the wire portion correspond to a thickness of the seed layer portion and to a duration of the growing step. The seed layer portion is then selectively removed while the wire portion is retained fixedly on the circuit. Afterwards, heating of the circuit can cause the wire portion becoming rounded in cross-section. The wire portion obtained may be about 10 nanometers in diameter. It may be used for forming a channel of a MOS transistor devoid of short channel effect.

REFERENCES:
patent: 6326311 (2001-12-01), Ueda et al.
patent: 6858478 (2005-02-01), Chau et al.
patent: 7078299 (2006-07-01), Maszara et al.
patent: 2006/0197163 (2006-09-01), Kato
patent: 2007/0026617 (2007-02-01), Adkisson et al.
patent: 10 2005 038 943 (2006-03-01), None
International Search Report, PCT/EP2008/062622, Dec. 23, 2008, 3 pages.

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