System and method for preventing a race condition

Details System and method for preventing a race condition System and method for preventing a race condition

2011-06-14

2011-06-14

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error count or rate

Reexamination Certificate

active

07962805

ABSTRACT:
A system that includes a first flip flop that is serially coupled to a second flip flop. The first flip flop includes a transfer circuit that is coupled between a master latch and a slave latch. The master latch of the first flip flop latches a scan data signal during a first portion of a cycle of a first clock signal that is provided to the first flip flop. The transfer circuit is conductive during a sub-portion of a second portion of the cycle of the first clock signal. The sub-portion starts after an occurrence of a predefined change in a control signal provided to the slave latch. The predefined change occurs after an estimated start of a first portion of a cycle of a second clock signal that is provided to the second flip flop. A master latch of the second flip flop latches the scan data signal during a first portion of a next cycle of the second clock signal.

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