Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2011-07-05
2011-07-05
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S733000
Reexamination Certificate
active
07975191
ABSTRACT:
A method and circuitry for checking the programming (P) and deletion (L) operations of memory cells (5) in a nonvolatile memory device (1). Parallel to the programming (P) or deletion (L) operations of the actual memory cells (5) the respective programming or deletion process is carried out on at least one similar checking cell (4.1, 4.2, 4.3), with the programming (P) or deletion (L) operations being less favorable by a defined extent than the programming (P) or deletion (L) operations of the actual memory cells (5). From the content of the checking cell (4.1, 4.2, 4.3) an evaluation device (6) determines whether the programming (P) or deletion (L) operation was successful or not, and a corresponding output signal (ak) indicative thereof is produced.
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Bayer Martin
Bidenbach Reiner
Fink Hans-Jörg
Rubehn Thilo
Ullrich Manfred
Gaffin Jeffrey A
Gandhi Dipakkumar
Micronas GmbH
Muncy Geissler Olds & Lowe, PLLC
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