Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2011-04-26
2011-04-26
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S032000, C326S033000
Reexamination Certificate
active
07932741
ABSTRACT:
The invention relates to an interfacing device for pseudo-differential transmission through interconnections used for sending a plurality of electrical signals. The interfacing device of the invention includes signal terminals and a common terminal distinct from the reference terminal (ground). A transmitting circuit receiving the input signals of the transmitting circuit coming from a source delivers, when the transmitting circuit is in the activated state, currents to the signal terminals. A receiving circuit delivers, when the receiving circuit is in the activated state, output signals of the receiving circuit determined each by the voltage between one of the signal terminals and the common terminal, to the destination. A termination circuit is such that, when it is in the activated state, it is approximately equivalent, for the signal terminals and the common terminal, to a network consisting of 4 branches, each branch being connected to the common terminal and to one of the signal terminals.
REFERENCES:
patent: 5381034 (1995-01-01), Thrower et al.
patent: 6195305 (2001-02-01), Fujisawa et al.
patent: 6304098 (2001-10-01), Drost et al.
patent: 6812734 (2004-11-01), Shumarayev et al.
patent: 7403040 (2008-07-01), Park et al.
patent: 2005/0253622 (2005-11-01), Dreps et al.
patent: 2006/0267633 (2006-11-01), King
patent: 2007/0117446 (2007-05-01), Broyde et al.
patent: 0531630 (1993-03-01), None
patent: 2849728 (2004-07-01), None
International Search Report for International Application No. PCT/IB2008/051826, dated Oct. 20, 2008.
Kudoh J et al: “A CMOS Gate Array With Dynamic-Termination GTL I/O Circuits” International Conference on Computer Design: VLSI in Computers and Processors. Austin, Oct. 2-4, 1995, New York, IEEE, US, Oct. 2, 1995, pp. 25-29, XP000631889; ISBN: 0-7803-3124-9; the whole document.
Broyde Frederic
Clavelier Evelyne
Barnes & Thornburg LLP
Excem SAS
Tran Anh Q
LandOfFree
Pseudo-differential interfacing device having a termination... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pseudo-differential interfacing device having a termination..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pseudo-differential interfacing device having a termination... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2633780