Semiconductor device with tapered trenches and impurity...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S342000, C257SE29257, C257SE29262

Reexamination Certificate

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07898031

ABSTRACT:
A single crystal semiconductor layer of a first conduction type is disposed on a surface of a semiconductor substrate. A plurality of trenches are provided in the semiconductor layer to form a plurality of first semiconductor regions of the first conduction type at intervals in a direction parallel to the surface. An epitaxial layer is buried in the plurality of trenches to form a plurality of second semiconductor regions of a second conduction type. The plurality of second semiconductor regions each includes an outer portion with a high impurity concentration formed against an inner wall of the trench, and an inner portion with a low impurity concentration formed inner than the outer portion.

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patent: 6627949 (2003-09-01), Blanchard
patent: 6656797 (2003-12-01), Blanchard
patent: 6740931 (2004-05-01), Kouzuki et al.
patent: 6888195 (2005-05-01), Saito et al.
patent: 7595530 (2009-09-01), Tokano et al.
patent: 2001/0053568 (2001-12-01), Deboy et al.
patent: 2004/0185665 (2004-09-01), Kishimoto et al.
patent: 2005/0006699 (2005-01-01), Sato et al.
patent: 2005/0029222 (2005-02-01), Chen
patent: 2004-72068 (2004-03-01), None
patent: 2004-119611 (2004-04-01), None
patent: 2004-134714 (2004-04-01), None

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