Peripheral component interconnect express interface and...

Details Peripheral component interconnect express interface and... Peripheral component interconnect express interface and...

2011-05-24

2011-05-24

Rinehart, Mark (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

C370S469000

Reexamination Certificate

active

07949809

ABSTRACT:
The present invention discloses a PCI Express interface and a method of signal processing, and particularly relates to the physical coding sub-layer that transmits data between physical media access layer and media access control layer of the PCI Express. The PCI express interface of present invention enables physical coding sub-layer to be able to receive or output 8-bit data as well as to receive or output 16-bit data by adding an input interface unit and an output interface unit in physical coding sub-layer, thereby the data formats of physical coding sub-layer and media access control layer are compatible; enables the physical coding sub-layer to be able to handle data with sampling errors during transmission from physical media access layer to physical coding sub-layer by adding data adjustment unit in the physical coding sub-layer and applying corresponding signal processing method, thereby it ensures the integrity of the data transmitted over physical coding sub-layer.

REFERENCES:
patent: 6993667 (2006-01-01), Lo
patent: 7152136 (2006-12-01), Charagulla
patent: 7257655 (2007-08-01), Burney et al.
patent: 2005/0120163 (2005-06-01), Chou et al.
Intel, Phy Interface for the PCI Express Architecture, Jul. 21, 2007, Intel Corporation.
Intel, Phy Interface for the PCI Express Architecture, Jun. 19, 2003, version 1.0.

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