Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2011-08-02
2011-08-02
Menz, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S737000, C438S706000
Reexamination Certificate
active
07989331
ABSTRACT:
A method of manufacturing a semiconductor device including forming a mask layer on a polycrystalline silicon film formed on a semiconductor substrate via an insulating film; forming a dense pattern and a sparse pattern on the mask layer to form a mask; etching the polycrystalline silicon film with the mask by controlling a temperature of the semiconductor substrate placed in an etching chamber at 50 degrees Celsius or higher, supplying an etching gas composed of a hydrogen bromide containing gas and a fluoromethane based gas into the chamber, and generating plasma in the chamber.
REFERENCES:
patent: 5387556 (1995-02-01), Xiaobing et al.
patent: 5846443 (1998-12-01), Abraham
patent: 6194284 (2001-02-01), Chen
patent: 6491835 (2002-12-01), Kumar et al.
patent: 6500727 (2002-12-01), Chen et al.
patent: 6531349 (2003-03-01), Yoshida et al.
patent: 6653237 (2003-11-01), Deshmukh et al.
patent: 6709984 (2004-03-01), Saito et al.
patent: 6784110 (2004-08-01), Wen et al.
patent: 7259067 (2007-08-01), Yang
patent: 7312158 (2007-12-01), Miyagawa et al.
patent: 2001/0036732 (2001-11-01), Yoshida et al.
patent: 2002/0115276 (2002-08-01), Yoshida et al.
patent: 2003/0003752 (2003-01-01), Deshmukh et al.
patent: 2005/0095784 (2005-05-01), Yang
patent: 2005/0215062 (2005-09-01), Miyagawa et al.
patent: 2006/0216938 (2006-09-01), Miyagawa et al.
patent: 2007/0184657 (2007-08-01), Iijima et al.
patent: 2008/0085593 (2008-04-01), Miyagawa
patent: 2008/0230519 (2008-09-01), Takahashi
patent: 2004-64020 (2004-02-01), None
patent: 2005-268292 (2005-09-01), None
patent: 2006-86486 (2006-03-01), None
Kabushiki Kaisha Toshiba
Menz Laura M
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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