Memory controller having a buffer for providing beginning...

Details Memory controller having a buffer for providing beginning... Memory controller having a buffer for providing beginning...

2011-03-01

2011-03-01

Lee, Chun-Kuan (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S022000, C710S023000, C710S024000, C710S025000, C710S026000, C710S027000, C710S028000, C710S308000

Reexamination Certificate

active

07899957

ABSTRACT:
A memory controller, such as a SDRAM controller, controls the way in which data is retrieved, in order to make more efficient use of the bandwidth of the memory data bus. More specifically, when a memory access request requires multiple data bursts on the memory bus, the SDRAM controller stores the data from the multiple data bursts in respective buffers. Data is then retrieved from the buffers such that data is read from a part of the first buffer, then from the other buffers, and finally from the remaining part of the first buffer. Storing the required data in the remaining part of the first buffer avoids the need to occupy the memory bus with a new data burst.

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“Microsoft Computer Dicitonary,” 2002, p. 469.

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