Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-01-28

2001-10-16

Zarabian, A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S189050

Reexamination Certificate

active

06304503

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device having a circuit for evaluating noise characteristic at the time of data output.
2. Description of the Background Art
FIG. 11
shows circuit configuration of output buffers
11
,
13
and
15
of a conventional semiconductor memory device, and
FIG. 12
shows a concept of a pattern layout of the output buffers.
As shown in
FIG. 11
, the output buffer is activated when an output control signal &phgr; activated and at a high (H) level is input to NAND circuits
4
and
6
.
In a semiconductor memory device having a plurality of input/output terminals
2
such as shown in
FIG. 12
, all output buffers are activated in normal operation, and data is output from every input/output terminal
2
.
Here, N channel MOS transistors TN
1
included in respective output buffers
11
,
13
and
15
are connected together to one V
CC
line
1
as shown in
FIG. 12
, and therefore in a so-called multi-bit product having a large number of input/output terminals
2
, there is a problem of considerable noise generated at the power supply voltage V
CC
at the time of data output. Therefore, it is necessary to minimize the influence of noise. In that case, what input/output terminal is susceptible to noise generation at the time of data output must be inspected. In the conventional semiconductor memory device, however, there is not any circuit provided for inspecting output terminal dependency of noise at the time of data output.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor memory device which is capable of evaluating noise characteristic generated at the time of data output.
The object of the present invention is attained by providing a semiconductor memory device having a normal operation mode and a test mode, including a plurality of output buffers and selecting means for selecting and activating at least one output buffer of said plurality of output buffers in response to an external signal in the test mode.
A main advantage of the present invention is that it is possible to evaluate input/output terminal dependency of the noise generated at the time of data output, as an output buffer is selectively activated among a plurality output buffers in the test mode.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent, from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.


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