Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-03-02
2001-10-16
Wiley, David (Department: 2155)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S113000
Reexamination Certificate
active
06304933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a method and apparatus for data transmission in general, and in particular to a method and apparatus for transmitting data on a bus. Still more particularly, the present invention relates to a method and apparatus for transmitting data on a bus connected either as separately packaged chips or as separate areas within a chip.
2. Description of the Prior Art
The technique of using a group of wires typically known as a bus to transmit data has been in common use since the early days of electronic computers. There are many advantages in using a single interconnecting scheme such as a bus for a computer system. For example, various subsystems within a computer system can be interfaced with each other via a bus. In addition, new devices and peripherals can easily be added or even be ported between computer systems that use a common bus. Furthermore, because a single set of wires can be shared among multiple sources and destinations, the cost associated with a bus implementation is relatively low.
However, for computer systems that are specifically designed for business applications, where the demands on input and output are relatively high, it is a major challenge to design a bus system capable of meeting these demands in an efficient manner. With conventional design, data is generally driven on to a bus, using logic voltage levels to encode and transmit a data bit in every wire within the bus, and this method of data transmission is sufficient for relatively narrow buses. But when wider buses are needed to meet the ever increasing throughput requirements, the problem of capacitive and inductive coupling between adjacent parallel bus wires and simultaneous switching of a large number of drivers with consequent peak current demand, becomes more significant. This is especially true for bus wiring within a chip as capacitive and resistive effects are much larger in such an environment due to the small dimensions of the bus wires and the close proximity of wire spacings from adjacent conductors. The present disclosure provides an improved method and apparatus for transmitting data on a bus such that these problems can be greatly reduced.
SUMMARY OF THE INVENTION
In accordance with a method and apparatus of the present invention, a bus includes multiple data lines. Each of the data lines within the bus is assigned a unique binary value. During data transmissions, only one of the data lines within the bus is activated at a time, and each activation of one of the data lines represents its associated unique binary value. Thus, an aggregate of consecutive activations represents the same information as if the data were transmitted in parallel.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 5901297 (1999-05-01), Fisch et al.
Bracewell & Patterson L.L.P.
International Business Machines - Corporation
Salys Casimer K.
Wiley David
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