Method and apparatus for analyzing cuts

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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Details

C700S195000, C700S187000, C702S179000

Reexamination Certificate

active

06192289

ABSTRACT:

FIELD OF THE INVENTION
The present relates to methods and apparatus for inspecting cuts generally and for inspecting cuts of semi-conductor dies in particular.
BACKGROUND OF THE INVENTION
A semiconductor wafer, shown in
FIG. 1
to which reference is made, is formed of a multiplicity of dies
10
each of which is to become an integrated circuit chip. Once manufacturing of the wafer and the circuits thereon is finished, a saw rotates a thin dicing blade, containing miniature diamonds, along the vertical and horizontal “streets”
12
between the dies
10
, thereby separating each die
10
from its neighbors. The individual dies are then encapsulated.
The saw has to be properly aligned to ensure that the cut occurs only within the relevant street
12
; otherwise, the integrated circuit die
10
will be ruined. The blowup portion of
FIG. 1
illustrates two dies
10
A and
10
B and the cut
14
therebetween. Cut
14
has two edges
16
A and
16
B, known as “kerfs”, which typically are similar to each other. Each kerf
16
is formed of “sawing chips”
18
which are indentations caused by the breaking of the wafer in response to the chipping action of the saw blade. As long as the kerfs
16
are sufficiently far away from the relevant die
10
, the cut is acceptable. However, if a crack or “sawing chip”
18
, such as sawing chip
18
A, is too close to the outer edge of the die
10
, the corresponding die (e.g. die
10
B) is disqualified.
There are additional complications. Due to the continual need to save “real estate” on the semiconductor wafer, the width of the streets
12
is continually narrowing, reducing the available margin of error. Furthermore, the streets
12
are often utilized for test pads and trial lithography which are sacrificed during the dicing. The portions of the lithographic elements remaining after dicing look similar enough to sawing chips that a die could be incorrectly disqualified.
FIG. 2
illustrates an exemplary cut having sawing chips and lithography lines. The elements marked with reference numeral
20
are lithography lines and those marked with reference numeral
22
are sawing chips. It will be appreciated that lithography lines
20
are not very different than sawing chips
22
, especially if the lithography lines
20
are even shorter than those shown in FIG.
2
. The sawing chip marked by
22
A is too close to the die, labeled
10
C.
Inspection is performed in a number of ways. Dicing saws typically are equipped with vision capabilities designed for machine set-up (e.g. for aligning the saw blade along the streets
12
). Since the dicing operation is performed under a stream of water, the kerf can only be viewed once the water stream is stopped and the wafer dried. For proper inspection, the wafer must be brought to a microscope and the microscope directed to the kerf areas. This process adds time and, since the sawing vision system cannot differentiate between lithographic lines and sawing chips, this operation is only marginally effective.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method and apparatus for analyzing the quality of sawing which does not require human inspection. The system of the present invention can be implemented as part of the manufacturing processes of semiconductor wafers, optical elements or any other type of hard material which is cut (such as by micromachining).
For semiconductor wafers, the system of the present invention differentiates between lithographic lines and sawing chips thereby to determine if any part of a kerf is too close to a die. It also determines whether or not the saw blade is properly aligned within the street to reduce the number of disqualified dies.
There is therefore provided, in accordance with a preferred embodiment of the present invention, a system for analyzing the quality of the sawing of a material which includes a scanning unit, a cut parameter identifier and a cut analyzer. The scanning unit scans along cuts of the material and views at least a portion of a cut. The cut parameter identifier identifies and stores parameters of the viewed cut portion. The cut analyzer analyzes the parameters of a multiplicity of viewed cut portions and which determines the quality of the cuts therefrom.
Additionally, in accordance with a preferred embodiment of the present invention, the cut parameter identifier includes a kerf identifier and a chip parameter identifier. The kerf identifier identifies upper and lower kerfs of the viewed cut portion. The chip parameter identifier identifies sawing chips along the upper and lower kerfs and determines parameters thereof.
Moreover, in accordance with a preferred embodiment of the present invention, the chip parameters include at least one of the following parameters: chip height, chip width, chip aspect ratio, chip penetration, chip roughness and chip slope.
Further, in accordance with a preferred embodiment of the present invention, the chip parameter identifier includes a unit which identifies possible sawing chips, a unit which determines the chip parameters for the possible sawing chips and a unit which marks the possible sawing chips as sawing chips or as non-chip elements based on the values of the chip parameters.
Still further, in accordance with a preferred embodiment of the present invention, the cut analyzer includes a cut parameter identifier which compares a center line of the viewed cut portion, defined by center lines of the upper and lower kerfs, to a center line of a street within which the cut occurred to produce at least one of the following cut parameters: cut angle and cut offset. The cut analyzer includes a unit which performs statistical analysis on the cuts of one or more wafers.
Moreover, in accordance with a preferred embodiment of the present invention, the material to be cut is a semiconductor or a hard material.
There is also provided, in accordance with a preferred embodiment of the present invention, a method of identifying sawing chips which includes the steps of: a) identifying upper and lower kerfs of a viewed cut section, b) identifying possible sawing chips along the upper and lower kerfs, c) determining chip parameters for each of the possible sawing chips and d) marking the possible sawing chips as sawing chips or as non-chips based on the values of the chip parameters.
Finally, in accordance with a preferred embodiment of the present invention, the step of marking includes the steps of a) associating a plurality of chip and non-chip membership values with the possible sawing chips based on the values of the chip parameters, b) summing the chip and non-chip membership values to produce membership sums and c) determining whether the possible sawing chip is a sawing chip based on the membership sums.


REFERENCES:
patent: 5314844 (1994-05-01), Imamura
patent: 5786266 (1998-07-01), Boruta
patent: 5814532 (1998-09-01), Ichihara
patent: 5871391 (1999-02-01), Pryor

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