Method and circuit arrangement for multiplying frequency

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

06304997

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a method and a circuit arrangement for frequency multiplication.
RELATED TECHNOLOGY
From telecommunications and computer engineering, one knows of analog frequency multiplication methods used for various purposes. Circuit arrangements designed for these various purposes are also known, which multiply the frequencies of sinusoidal and cosinusoidal oscillations. In this context, the circuit expenditure is considerable, particularly when working with multiples, which are not a square (power of two) of the output frequency, since, depending on the particular realization, additional division circuits might even be necessary. Circuits of this kind, designed, for example, as PLL (phase-locked loop) circuits, are described, for example, in the book by U. Tietze, Ch. Schenk, Halbleiterschaltungstechnik [Semiconductor Circuit Engineering], Springer Publishers, 1980. The Chebyshev polynomials of the nth order are defined by the equation T
n
(cos(&psgr;))=cos(n&psgr;).
The Chebyshev polynomials are described for example in I. Schur, “Arithmetisches über die Teschebyscheffschen Polynome” [Arithmethic Aspects of Chebyshev Polynomials], Collection of Treatises vol. III, pp. 422 to 453, Springer Publishers 1973 which is hereby incorporated by reference herein.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method and a circuit arrangement for performing analog frequency multiplication using simple and easily combined modules, which will eliminate, in particular, the need for division circuits used in existing methods, when it is required to produce multiples of a fundamental frequency which are not a power of two thereof.
The present invention provides a method of frequency multiplication, the method including providing a plurality of circuit modules for realizing Chebyshev polynomials of the nth order T
n
(x)), the Chebyshev polynomials having arithmetic properties and being defined by T
n
(cos(&ohgr;t))=cos(n&ohgr;t). The circuit modules are interconnected to form a modular circuit array or a modular circuit structure using at least one of the relations T
nm
(x)=T
n
(T
m
(x)) and T
n+m
(x)=T
n
(x)T
m
(x)−T
n−m
(x). A cosinusoidal oscillation having a first frequency is applied to an input of the circuit module for the Chebyshev polynomial (T
n
(x)) so as to generate a cosinusoidal oscillation having a second frequency at an output of the circuit module, the second frequency being a factor of n times the first frequency.
The present invention also provides a circuit arrangement for frequency multiplication, the circuit arrangement including a first circuit module for realizing a first Chebyshev polynomial T
m
(x) defined by T
m
(cos(&ohgr;t))=cos(m&ohgr;t), the first circuit module being capable of accepting a first sinusoidal/cosinusoidal oscillation input having a first frequency and outputting a third sinusoidal/cosinusoidal oscillation having an third frequency, the third frequency being a factor of m times the first frequency. A second circuit module is provided for realizing a Chebyshev polynominal T
n
(x) defined by T
n
(cos(&ohgr;t))=cos(n&ohgr;t), the second circuit module being capable of accepting a second sinusoidal/cosinusoidal oscillation input having a second frequency and outputting a fourth sinusoidal/cosinusoidal oscillation having fourth frequency, the fourth frequency being a factor of n times the second frequency, the second circuit module being connected to the first circuit module to form a modular circuit array or a modular circuit structure using at least one of the relations T
nm
(x)=T
n
(T
m
(x)) and T
n+m
(x)=T
n
(x)T
m
(x)−T
n−m
(x).
The present invention also provides a circuit arrangement for frequency multiplication where the circuit arrangement includes a first circuit module for realizing a first function T
m
(x) defined by T
m
(x)=(½)((x+(x
2
−1)
½
)
m
+(x−(x
2
−1)
½
)
m
), m being a rational or a real number, the first circuit module being capable of accepting a first sinusoidal/cosinusoidal oscillation input having a first frequency and outputting a third sinusoidal/cosinusoidal oscillation having an third frequency, the third frequency being a factor of m times the first frequency. A second circuit module is provided for realizing a second function T
n
(x) defined by T
n
(x)=(½) ((x+(x
2
−1)
½
)
n
+(x−(x
2
−1)
½
)
n
), n being a rational or a real number, the second circuit module being capable of accepting a second sinusoidal/cosinusoidal oscillation input having a second frequency and outputting a fourth sinusoidal/cosinusoidal oscillation having fourth frequency, the fourth frequency being a factor of n times the second frequency, the second circuit module being connected to the first circuit module to form a modular circuit array or a modular circuit structure using at least one of the relations T
nm
(x)=T
n
(T
m
(x)) and T
n+m
(x)=T
n
(x)T
m
(x)−T
n−m
(x).
An advantage of the method and device of the present invention is that, by using structures derived from Chebyshev polynomials, a frequency multiplication is able to be achieved using simple and easily combined modules or modular circuit structures.
If a cosinusoidal oscillation is expressed as an input variable in terms of T
n
(x), then a cosinusoidal oscillation with an n-fold frequency is obtained at the output. Information on Chebyshev polynomials can be found, for example, in Abramawitz, Stegun: Handbook of Mathematical Functions. The first Chebyshev polynomials are expressed as: T
o
(x)=1, T
1
(x)=x, T
2
(x)=2x
2
−1, etc. in accordance with T
n+1
(x)=2xT
n
(x)−T
n−1
(x). They can be produced using multiplier circuits and adder or subtracter circuits. To realize any n, the following relations are particularly helpful:
T
n−m
(
x
)=
T
n
(
T
m
(
x
))
T
n+m
(
x
)=2
·T
m
(
x

T
n
(
x
)−
T
n−m
(
x
).
The Chebyshev polynomials, as well as the multiplier circuits and summing circuits, i.e., adder or subtracter circuits required for an implementation in terms of circuit engineering, are able to be realized using integrated circuit engineering, and are then able to perform the most widely varying, desired functions, depending on the external wiring or interconnections. Other functions mentioned here which can be easily realized with such a chip are the synthesis of any desired functional progression by expressing the function as a Chebyshev series, or using the function T
n
(x) as an amplifier having a gain n for small x where sin(nx)≈nx, and for uneven (odd) n.
The present invention will be elucidated in the following on the basis of embodiments depicted in the drawings. The terms specified in the list of reference symbols at the end of this document and the associated reference symbols are used in the Specification, in the Claims, and in the Abstract.


REFERENCES:
patent: 4163960 (1979-08-01), Ernyei et al.
patent: 4327341 (1982-04-01), Ernyei
patent: 32 31 919 (1984-03-01), None
patent: 33 03 133 (1984-08-01), None
Safaai-Jazi, “A New Method for the Analysis and Design of Chebysev Arrays,” IEEE, pp. 157-161, 1994.*
Surakampoontorn, “Sinuooidal Frequency Doubles Using Operational Amplifiers,” IEEE Trans. on Instrumentation and Measurement, vol. 37, No. 2, pp. 259-262, 1988.*
Wu et al.,“A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based on Backward Chebyshev Recursion,” ISCAS '94, pp. 155-158, 1994.*
U. Tietze et al., “Halbleiterschaltungstechnik,” [Semiconductor Circuit Engineering], Springer Publishers, 1980,* no pg #.
I. Schur, “Arithmetisches über die Teschebyscheffschen Polynome,” [Arithmethic [Aspects] of Chebyshev Polynomials], Springer Publishers 1973, Collection of Treatises vol. III, pp. 422-453.*.
Abramawitz, Stegun: Handb

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