Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1998-12-04
2001-10-16
Chung, Phung M. (Department: 2819)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S756000
Reexamination Certificate
active
06304991
ABSTRACT:
BACKGROUND OF THE INVENTION
I. Field of the Invention
The present invention pertains generally to the field of coding for communications systems, and more specifically to interleavers for turbo coders.
II. Background
Transmission of digital data is inherently prone to interference, which may introduce errors into the transmitted data. Error detection schemes have been suggested to determine as reliably as possible whether errors have been introduced into the transmitted data. For example, it is common to transmit data in packets and add to each packet a cyclic redundancy check (CRC) field, for example of a length of sixteen bits, which carries a checksum of the data of the packet. When a receiver receives the data, the receiver calculates the same checksum on the received data and verifies whether the result of the calculation is identical to the checksum in the CRC field.
When the transmitted data is not used on-line, it is possible to request retransmission of erroneous data when errors are detected. However, when the transmission is performed on-line, such as, e.g., in telephone lines, cellular phones, remote video systems, etc., it is not possible to request retransmission.
Convolutional codes have been introduced to allow receivers of digital data to correctly determine the transmitted data even when errors may have occurred during transmission. The convolutional codes introduce redundancy into the transmitted data and pack the transmitted data into packets in which the value of each bit is dependent on earlier bits in the sequence. Thus, when errors occur, the receiver can still deduce the original data by tracing back possible sequences in the received data.
To further improve the performance of a transmission channel, some coding schemes include interleavers, which mix up the order of the bits in the packet during coding. Thus, when interference destroys some adjacent bits during transmission, the effect of the interference is spread out over the entire original packet and can more readily be overcome by the decoding process. Other improvements may include multiple-component codes that encode the packet more than once, in parallel or in series. For example, it is known in the art to employ an error correction method that uses at least two convolutional coders in parallel. Such parallel encoding is commonly referred to as turbo coding.
For multiple-component codes, optimal decoding is often a very complex task, and may require large periods of time not usually available for on-line decoding. Iterative decoding techniques have been developed to overcome this problem. Rather than determining immediately whether received bits are zero or one, the receiver assigns each bit a value on a multilevel scale representative of the probability that the bit is one. A common scale, referred to as log-likelihood ratio (LLR) probabilities, represents each bit by an integer in some range, e.g., {−32,31}. A value of 31 signifies that the transmitted bit was a zero with very high probability, and a value of −32 signifies that the transmitted bit was a one, with very high probability. A value of zero indicates that the logical bit value is indeterminate.
Data represented on the multilevel scale is referred to as “soft data,” and iterative decoding is usually soft-in/soft-out, i.e., the decoding process receives a sequence of inputs corresponding to probabilities for the bit values and provides as output corrected probabilities, taking into account constraints of the code. Generally, a decoder that performs iterative decoding uses soft data from former iterations to decode the soft data read by the receiver. During iterative decoding of multiple-component codes, the decoder uses results from decoding of one code to improve the decoding of the second code. When parallel encoders are used, as in turbo coding, two corresponding decoders may conveniently be used in parallel for this purpose. Such iterative decoding is carried out for a plurality of iterations until it is believed that the soft data closely represents the transmitted data. Those bits that have a probability indicating that they are closer to one (for example, between 0 and 31 on the scale described above) are assigned binary zero, and the remaining bits are assigned binary one.
“Turbo coding” represents an important advancement in the area of forward error correction (FEC). There are many variants of turbo coding, but most types of turbo coding use multiple encoding steps separated by interleaving steps combined with the use of iterative decoding. This combination provides previously unavailable performance with respect to noise tolerance in a communications system. Namely, turbo coding allows communications at levels of energy-per-bit per noise power spectral density (E
b
/N
0
) that were previously unacceptable using the existing forward error correction techniques.
Many communications systems use forward error correction techniques and therefore would benefit from the use of turbo coding. For example, turbo codes could improve the performance of wireless satellite links, in which the limited downlink transmit power of the satellite necessitates receiver systems that can operate at low E
b
/N
0
levels.
Digital wireless telecommunication systems, for example, such as, e.g., digital cellular and PCS telephone systems, also use forward error correction. For example, the Telecommunications Industry Association has promulgated the over-the-air interface standard TIA/EIA Interim Standard 95, and its derivatives, such as, e.g., IS-95B (hereinafter referred to collectively as IS-95), which define a digital wireless communications system that uses convolutional encoding to provide coding gain to increase the capacity of the system. A system and method for processing radio-frequency (RF) signals substantially in accordance with the use of the IS-95 standard is described in U.S. Pat. No. 5,103,459, which is assigned to the assignee of the present invention and fully incorporated herein by reference.
There is an ongoing drive in the communications industry to continually improve coding gains. In conventional digital wireless communications systems, it has been found that a serial interleaver for turbo coding may be advantageously implemented with a congruent random sequence. It is known in the art that a uniform random sequence may be generated by using a linear congruential recursion algorithm. See, e.g., 2 D. Knuth
The Art of Computer Programming
(1969) (describing generation of pseudo-random numbers with linear congruential recursion). It has also been found that a parallel turbo coder employing a two-dimensional interleaver (i.e., an interleaver organized as a rectangular data array comprising rows and columns) generally outperforms a parallel turbo coder having a one-dimensional interleaver (i.e., an interleaver in which the data is organized as a single, linear array) in terms of coding gain.
It would be advantageous to further enhance the performance of a turbo coder. Additionally, as turbo coders are significantly more complex to implement than are convolutional coders, it would be desirable to provide a turbo coder implementation with reduced complexity. Thus, there is a need for a reduced-complexity, two-dimensional interleaver that uses multiple linear congruential sequences.
SUMMARY OF THE INVENTION
The present invention is directed to a reduced-complexity, two-dimensional interleaver that uses multiple linear congruential sequences. Accordingly, in one aspect of the invention, a turbo coder advantageously includes a first coder configured to receive a plurality of input bits in succession and generate a first plurality of output symbols therefrom; an interleaver configured to receive the plurality of input bits in succession, the interleaver including a plurality of bit storage locations arranged in a matrix of rows and columns and a linear congruential sequence generator configured to pseudo-randomly generate a sequence for shuffling bits within each row of the interleaver; and a second coder config
Ling Fuyun
Rowitch Douglas N.
Baker Kent D.
Chung Phung M.
Qualcomm Incorporated
Rouse Thomas R.
Wadsworth Philip R.
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