Multiple user interfaces for an integrated flash device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C326S041000, C710S120000

Reexamination Certificate

active

06330635

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of integrated circuits and, more specifically, to interfaces for integrated circuits.
BACKGROUND
The motherboard is the main circuit board inside a computer which holds the processor, memory, and expansion slots and connects directly or indirectly to every part of the computer. The motherboard contains a control chipset, a memory device storing code, and the various buses used to link the motherboard components.
Typically, the memory on a motherboard is a Basic Input Output System (BIOS) memory component. BIOS consists of low-level code in a memory component that enables communication between the computer's operating system and hardware, including peripheral technologies. The BIOS also provides the initial instructions for power on self-test and booting system files. The BIOS component is tested by the memory manufacturer to verify compliance with specifications before shipment to the motherboard manufacturer. The motherboard manufacturer then programs the code into the BIOS component. The programming may be performed either before or after the BIOS component is mounted on the motherboard.
A BIOS must also be periodically updated to keep pace with new peripheral technologies. If the BIOS is stored on a read only memory (ROM) chip, it must be replaced. However, if the BIOS is stored on a programmable memory chip, it may be upgraded using software to reprogram the memory to be compatible with new peripheral technologies.
One prior art BIOS memory component is assembled in a package containing an additional set of pins that are dedicated for use with the programming function performed by the motherboard manufacturer. One problem with such a device is that the use of dedicated pins adds to the total pin count of the packaged device, thereby necessitating the use of a larger package. With the industry trend towards smaller system components, the use of a large package detracts from the desirability of a component.
Furthermore, with prior art BIOS memory components, a device interface specification must be provided to a motherboard manufacturer for programming the memory component. One problem with providing a device interface specification is that it may be undesirable to disclose a proprietary interface to the public.
SUMMARY OF THE INVENTION
A memory device including a plurality of device circuitry coupled to a plurality of device pads. The memory device also including an operation interface to operate the memory device in an operation mode and a plurality of interfaces to operate the memory device in a plurality of other modes. Each interface of the plurality of interfaces having a predetermined correlation between the plurality of device circuitry and the plurality of device pads. The memory device may also include a configuration circuit to select among the operation interface and the plurality of interfaces.
Additional features and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows.


REFERENCES:
patent: 5802559 (1998-09-01), Bailey
patent: 5841715 (1998-11-01), Farmwald et al.
patent: 5905683 (1999-05-01), McClure
Carroll, M. and Boyd-Merritt, R., “Intel pushes graphics integration, raises antitrust concerns,” EE Times Online, posted Jul. 19, 1998 on www.eetimes.com, 4 pages.
Boyd-Merritt, R., and Carroll, M., “Intel's security plans raise fear from PC builders,” EE Times Online, posted Dec. 12, 1998 on www.eetimes.com, 5 pages.

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