Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-02-24
2001-12-04
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S339000, C257S345000, C257S355000, C257S401000, C257S402000, C257S403000, C257S404000
Reexamination Certificate
active
06326656
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a lateral high-voltage transistor having a semiconductor body made of a lightly doped semiconductor substrate of a first conductivity type and an epitaxial layer of a second conductivity type provided on the semiconductor substrate. The transistor has a drain electrode a source electrode, a gate electrode and a semiconductor zone of the first conductivity type located under the gate electrode and embedded in the epitaxial layer.
Highly conductive lateral high-voltage transistors have already been proposed in a wide variety of configurations and are described for example in Published German Patent Application DE-A-43 09 764, U.S. Pat. No. 4,754,310, and U.S. Pat. No. 4,811,075. However, these conventional lateral high-voltage transistors are relatively difficult to fabricate, since the parallel n-conducting and p-conducting regions provided therein must have exactly the same area doping or sheet doping.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a lateral high-voltage transistor which overcomes the above-mentioned disadvantages of the heretofore-known transistors of this general type and which is distinguished by a structure that is relatively simple to fabricate.
With the foregoing and other objects in view there is provided, in accordance with the invention, a lateral high-voltage transistor, including:
a semiconductor body including a semiconductor substrate and an epitaxial layer, the semiconductor substrate being of a first conductivity type and having a first dopant concentration, the epitaxial layer being provided on the semiconductor substrate and being of a second conductivity type, the second conductivity type being opposite the first conductivity type;
a drain terminal region and a source terminal region provided in the semiconductor body, and a gate terminal region;
a semiconductor zone of the first conductivity type provided under the gate terminal region and being embedded in the epitaxial layer; and
the epitaxial layer having trenches formed therein, the trenches being defined by walls, the walls being of the first conductivity type and having a second dopant concentration higher than the first dopant concentration, the trenches being organized in lines and rows between the source terminal region and the drain terminal region.
In other words, in the case of a lateral high-voltage transistor of the type mentioned above, the object of the invention is achieved through the use of trenches in the epitaxial layer which are disposed in lines and rows between the source electrode and the drain electrode and whose walls are highly doped with a dopant of the first conductivity type.
In this case, the trenches are interconnected in a line by line manner between the source electrode and the drain electrode on the surface of the epitaxial layer by lightly doped, strip-shaped regions of the first conductivity type.
Given a layer thickness of the epitaxial layer of, for example, approximately 20 &mgr;m, the trenches have a depth of approximately 18 &mgr;m and a diameter of approximately 1 &mgr;m.
The distance between rows of the trenches, that is to say between trenches in the direction between the source electrode and the drain electrode, is preferably dimensioned in such a way that the depletion of the region of the second conductivity type between the rows of trenches takes place before the trenches or their walls of the first conductivity type reach the breakdown voltage with respect to the epitaxial layer of the second conductivity type.
In the case of the lateral high-voltage transistor according to the invention, if a positive voltage is present at the drain electrode, while the source electrode is connected to ground, the depletion zone or space charge zone grows from the side of the source electrode in the direction of the side of the drain electrode as the voltage at the drain electrode rises. In this case, the floating trenches of the first conductivity type are, in a row by row manner, at the potential with which the depletion zone has reached the corresponding row of trenches. The depletion of charge carriers of the regions of the second conductivity type between the rows of trenches of the first conductivity type preferably takes place before the trenches of the first conductivity type reach the breakdown voltage with respect to the epitaxial layer of the second conductivity type.
Preferably, as already explained, the trenches are interconnected in lines on the surface of the semiconductor body by narrow regions of the first conductivity type, which are in the shape of strips and are lightly doped.
The trenches may form a structure which is formed to be annular or ellipsoidal in an elongate manner, the drain electrode essentially being disposed in the center of such a structure.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a lateral high-voltage transistor, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 4754310 (1988-06-01), Coe
patent: 4811075 (1989-03-01), Eklund
patent: 5111254 (1992-05-01), Levinson et al.
patent: 43 09 764 A1 (1924-09-01), None
patent: 41 07 909 A1 (1991-09-01), None
Japanese Patent Abstract No. 62018768 (Sasaki), dated Jan. 27, 1987.
“A High Voltage Bulk Mesfet using In-Situ Junctions” (Levinson et al.), dated Apr. 8, 1991, IEEE Conference Record of the 1990 Ninteenth Power Modulator Symposium, pp. 347-351.
Greenberg Laurence A.
Lerner Herbert L.
Siemens Aktiengesellschaft
Stemer Werner H.
Wojciechowicz Edward
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