Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-23
2001-12-04
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S369000, C257S401000, C257S391000, C257S393000
Reexamination Certificate
active
06326666
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to DTCMOS circuits which are implemented in SOI. Specifically, a circuit is described having a plurality of input transistors whose threshold voltage is controlled by an early arriving logic input signal.
Dynamic threshold metal oxide semiconductor (DTMOS) devices can be fabricated on silicon-on insulator (SOI) substrates as described, for instance in U.S. Pat. No. 5,559,368. The SOI environment has offered the promise of reducing device sizes to the submicron gate level. The MOSFET devices are fabricated using a layer of semiconductor material deposited over an insulation layer of a supporting bulk wafer. The resulting structure includes a film of monocrystalline silicon on a buried layer of silicon oxide. The bulk silicon material from which the channel of the MOSFET device is formed is either grounded, or in many applications connected to the source region of the device. In accordance with the application described in the aforesaid referenced patent, the MOSFET device monocrystalline silicon film is connected to the gate of the MOSFET device to reduce the turn-on voltage (V
t
) when the gate voltage is high. The reduced threshold voltage V
t
for the device improves its performance in numerous respects. When the FET is OFF, the threshold voltage is increased reducing subthreshold leakage currents.
Applications which use DTCMOS devices provide not only the advantage of lower leakage currents while the MOSFET device is off, and lower threshold voltages when the device is on, but may also improve the speed of circuits utilizing MOSFET. The present invention is directed to one such application for improving the speed of DTCMOS logic circuits.
SUMMARY OF THE INVENTION
A DTCMOS circuit is implemented in SOI technology to perform a logical combination of input logic signals. The circuit includes a plurality of input transistors which receive on a gate thereof respective logic signals which are to be logically combined. The transistors formed in the SOI technology have a body contact connected to the monocrystalline silicon film of the device. Use is made of the body contact for controlling the voltage threshold V
t
of a device which receive a respective logic signal.
In accordance with a preferred embodiment of the invention, an earlier arriving logic signal is coupled to the gate of one input transistor, as well as to the body contact of another transistor receiving a later arriving logic signal. A data transition on the earlier arriving logic signal will lower the voltage threshold of the input transistor receiving the later arriving signal. Thus, a dynamic lowering of the voltage threshold occurs permitting an increase in speed for the logic circuit. The DTCMOS circuit provides for the usual advantages of lower voltage thresholds and reduced power supply voltage requirements, as well as improves the speed for the circuit due to the lowering of the voltage threshold on input transistors which receive later arriving logic signals.
REFERENCES:
patent: 3737673 (1973-06-01), Suzuki
patent: 4122360 (1978-10-01), Kawagai et al.
patent: 5461330 (1995-10-01), Gist et al.
patent: 5465054 (1995-11-01), Erhart
patent: 5467048 (1995-11-01), Watanabe
patent: 5514982 (1996-05-01), Hall et al.
patent: 5559368 (1996-09-01), Hu et al.
patent: 5583454 (1996-12-01), Hawkins et al.
patent: 5729155 (1998-03-01), Kobatake
patent: 5748029 (1998-05-01), Tomasini et al.
patent: 6064263 (2000-05-01), Nowak
Bernstein Kerry
Rohrer Norman J.
Connolly Bove Lodge & Hutz
International Business Machines - Corporation
Wojciechowicz Edward
LandOfFree
DTCMOS circuit having improved speed does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with DTCMOS circuit having improved speed, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DTCMOS circuit having improved speed will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2587530