Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1998-09-17
2001-12-11
Smith, Matthew (Department: 2768)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06330708
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to processes for creating photomasks which are used in integrated circuit manufacture. Specifically, a process is described for creating a photomask exposure data file for defining objects on a photomask.
The process of manufacturing integrated circuit masks which are used in photolithographic techniques to define semiconductor structures on a substrate relies upon the generation of one or more pattern files that define the exposure areas of the photomask as well as a Job Deck or similar file, depending on the specific exposure tool that is used. The layout for the photomask is created from the pattern files, such as a Moving Electron Beam Exposure (MEBES) data file. The data is based on specific designer inputs which define functional logic and which are subsequently modified for particular semiconductor processes and vendor equipment. The design specification created by the circuit designer is used as an input for algorithms which define photomask structural details.
Using a conventional data conversion and manipulation (fracturing) software, such the Computer Aided Transcription System (CATS) from Transcription Enterprises, Ltd., the designer's input in the form of levels is subjected to an algorithm which defines the photomask structures. A series of CATS Include Files are created from the results of combining the algorithm with information about the input data, and these Include files are then passed to the CATS execution software which performs the operations and produces the pattern data. Various mask creating tools use this pattern data (which can vary based on the specific tool used) to create masks defining the particular regions to be created on a semiconductor substrate to obtain the designer's specified circuit functionality.
As the volume of data which is necessarily entered to create these Include files involves several people using several processes, errors are likely. Automating the process of creating the CATS Include Files reduces mask errors, correspondingly increasing yields and reducing processing time.
The present invention further automates the process of creating the CATS Include Files so that user inputs are held to a minimum, reducing the errors and subsequent inefficiency of mask production.
The algorithms which define the photomask structures can be more efficiently processed if the Include files are created (and controlled) to enhance parallel processing. The process of creating the Include Files is therefore advantageously structured to create numerous include files that can be executed in parallel, thus further improving the efficiency of mask production.
SUMMARY OF THE INVENTION
The present invention provides for a method of producing CATS Include Files which is automated to reduce errors in the photomask production. The CATS Include Files are constructed from build information received from the product engineer. The build information is used with the algorithms to determine functions that must be performed on the data to produce the polygons that will be put in the pattern data. This pattern data is then used to expose a photomask, which defines one layer of the intended circuit. A series of photomasks, based on the semiconductor process being used, each specify one layer of the entire circuit that will appear on the semiconductor wafer. The creation of the CATS Include files is accomplished on an automated basis, and creates command files which are most efficient for processing the given design data. The resulting Include files are passed to CATS where they are executed to produce the pattern data. This pattern data is then used by the mask exposure tool to make the photomask.
In accordance with the invention, the table of algorithms is created by the product engineer which identifies each level of the design to be used in any given photomask layer. This may be done independently for each piece of design data that will appear on a photomask, if multiple designs will be built on the same photomask. Each of these independent pieces of resulting pattern data can be referred to as a segment. In addition to the algorithm table, a key word table is created by the product engineer to identify any special functions that must be performed on the data which define changes to be made to the polygons in the pattern data. These changes are usually for the purpose of optimizing the yield of the photomask fabrication and/or the subsequent integrated circuit fabrication processes.
In creating the final data used to manufacture a mask, compensations for dimensions of the polygons are applied to one or more data levels of the design data, based on inputs from a table. This is based on the specific process and vendor tools to be used in the photomask and integrated circuit manufacture. Optimal mathematical steps are then derived from the algorithms and include any respective dimensional compensations which are needed. Each of these mathematical steps is then broken down into one or more CATS Include files, which can be executed to create the pattern data used in photomask production.
Each of the CATS Include files are set up in executable substeps designed to enhance parallel computation for creating the pattern data. A series of dependencies is developed as the Include files are derived which identifies which of the substeps depend on a previous substep's computation, thereby facilitating efficient parallel processing of the substeps. The resulting CATS Include files are integrated with other Include files that were generated to produce the inspection data for the photomask into a command file. This command file is then submitted to the Load Leveler software (produced by IBM) which executes CATS using the given Include files (in parallel where possible) to produce the output pattern and inspection data.
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Houchen Stephen B.
Parker Thomas R.
Connolly Bove Lodge & Hutz
International Business Machines - Corporation
Smith Matthew
Thompson A. M.
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