Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-03-27
2001-10-09
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S314000, C257S316000
Reexamination Certificate
active
06300657
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to self-aligned dynamic threshold field effect devices and the method of making such devices. More specifically, this invention relates to insulated gate field effect devices formed as isolated semiconductor devices, such as with silicon-on-insulator (SOI) technology, where the gate is connected to the body of the device to provide dynamic threshold operation.
2. Description of Related Art
The demand for high performance and low power consumption microelectronic devices has increased with the expansion of the market for portable electronic devices such as laptops, cell phones and the like. Dynamic threshold devices, including insulated gate field effect transistors (IGFETs), MOSFETs and similar devices offer this desirable combination by their ability to operate at extremely low voltages, such as at 0.6 volts or less.
Dynamic threshold devices generally operate by connecting the body of the device to the gate of the device. Making this connection causes the threshold voltage, i.e., the voltage at which the device begins to conduct, to be reduced as compared to conventional CMOS technology which typically has a threshold voltage of 0.6 volts or more.
The reduction in threshold voltage (which is actually a dynamically changing threshold voltage) allows an ultra-low power supply voltage to be used. The reduction in the power supply voltage substantially reduces power consumption of the device. This generally reduces battery weight, decreases the heat dissipation requirements and provides other advantages for the designer of portable electronic devices.
Because the body of each dynamic threshold device must be electrically isolated from the body of each adjacent device, dynamic threshold devices typically are constructed with SOI or bulk triple well technologies.
One difficulty with the production of devices of this type has been the space required for the body contact. Prior designs have placed the body contact along the entire length of the device. This uses valuable device space, but is necessary due to the relatively low conductivity of the body. Another problem has been the necessity for separately aligning the body contact relative to the device.
The present invention addresses these problems by introducing a buried self-aligned highly doped low-resistance body, located below the gate dielectric. The low resistance of the body allows a relatively small area at an end of the device to be used to make connection to the body region. The low-resistance body is constructed in a way which accurately aligns it and places it precisely next to, but not abutting, the source and drain regions.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of making a dynamic threshold field effect device where the surface area used for the body connection is reduced as compared to previous designs.
It is another object of the present invention to provide a method of making a dynamic threshold field effect device having a buried low-resistance body region.
A further object of the invention is to provide a method of making a dynamic threshold field effect device having a buried low-resistance body region wherein the body region is formed by a self-aligning process relative to the gate dielectric and the gate.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method of making a dynamic threshold field effect device and the device made by the method. The method starts with a substrate having an isolated semiconductor region defined on a surface thereof. The substrate is typically an SOI substrate.
A mandrel layer is deposited on the surface of the substrate, and a gate opening is etched in the mandrel layer over the semiconductor region. The gate opening is used for subsequently forming elements of the device which are all self-aligned relative to the gate opening in the mandrel layer.
Spacer material is then deposited to narrow the gate opening, and a highly doped body region is then formed in the semiconductor region. The highly doped region is aligned by the narrowed gate opening, and the narrowing assures that subsequently formed diffusion regions on opposite sides of the highly doped region, which form source and drain regions, are not in contact with the low resistance body structure formed by the highly doped region.
The spacer material is then removed and a dielectric layer is formed in the gate opening to form the gate dielectric. Gate material, such as polysilicon or tungsten, is then deposited in the gate opening to at least partially form the gate. The mandrel layer is removed, and source and drain regions are formed next to, but not abutting, the highly doped region.
The highly doped region is typically formed by ion a implantation. Preferably, a sacrificial layer of oxide is grown in the gate opening before the spacer material is deposited and the highly doped region is formed by ion implantation through this sacrificial layer, which protects the surface. The sacrificial layer is removed from the gate opening after the spacer material is removed.
In the most highly preferred aspect of the invention, a contact region is formed, in good electrical contact with the highly doped region, by etching an opening in the dielectric layer and implanting dopant to form the contact region. Also in the preferred method, a first portion of the gate material is deposited in the gate opening prior to etching an opening in the dielectric layer. When the opening is etched in the dielectric layer, an opening is also etched in the first portion of the gate material. A second portion of gate material is then deposited after the contact region is formed, the second portion of gate material being in good electrical contact with the contact region.
When the gate material used is polysilicon, a metal silicide layer is then formed over the gate material.
The invention also includes a dynamic threshold field effect device according to the method. The dynamic threshold field effect device includes a substrate having an isolated semiconductor region defined on a surface thereof. A dielectric layer is formed on the surface of the semiconductor region and a gate is formed above the dielectric layer.
A low-resistance body region is located in the semiconductor region below the dielectric layer and is formed by means of a self aligned process relative to the dielectric layer. The body region is created by the self-aligning process with a width less than the dielectric layer. A contact region is in good electrical contact with the body region and source and drain regions are located on opposite sides of the body region, next to, but not abutting, the body region.
Preferably the contact region is connected to the gate by having the gate overlie the contact region, which is preferred to be located at an end of the device. By positioning the contact region at one end, the area taken up by the device on the substrate is reduced, and proper operation of the device in this configuration is provided by the low resistance of the body region which does not need connection along its length.
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IEE Transactions on Electron Devices, “Deep Submicrometer Double-Gate Fully-Depleted SOI PMOS Devices: A concise Short-Channel Effect Threshold Voltage Model U
Bryant Andres
Nowak Edward J.
DeLio & Peterson LLC
Dickey Thomas L
International Business Machines - Corporation
Peterson Peter W.
Shkurko Eugene I.
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