Method of making field effect transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

Other Related Categories

C438S286000, C438S300000

Type

Reexamination Certificate

Status

active

Patent number

06235562

Description

ABSTRACT:

TECHNICAL FIELD
This invention relates specifically to film transistor technology.
BACKGROUND OF THE INVENTION
As circuit density continues to increase, there is a corresponding drive to produce smaller and smaller field effect transistors. Field effect transistors have typically been formed by providing active areas within a bulk substrate material or within a complementary conductivity type well formed within a bulk substrate. One recent technique finding greater application in achieving reduced transistor size is to form field effect transistors with thin films, which is commonly referred to as “thin film transistor” (TFT) technology.
With TFTs, a substantially constant thickness thin film of material (typically polysilicon) is first provided. A central channel region of the thin film is masked, while opposing adjacent source/drain regions are doped with an appropriate p or n type conductivity enhancing impurity. A gate insulator and gate is provided either above or below the thin film channel region, thus providing a field effect transistor having active and channel regions formed entirely within a thin film as opposed to a bulk substrate.
In TFT technology, one goal is to provide the thin film as thin as possible to produce a thin channel region which provides maximized desired on/off characteristics for the transistors. Such, however, adversely affects source/drain region conductance due to diminished volume of material, thus resulting in undesirable elevated Vcc source/drain resistance.
It would be desirable to improve upon methods of forming thin film transistors and in improving thin film transistor constructions.


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