Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate
2000-04-27
2001-05-15
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having fuse element
C257S530000, C257S410000, C438S600000
Reexamination Certificate
active
06233194
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to integrated circuits and in particular the present invention relates to a circuit and method of anti-fuse repair.
BACKGROUND OF THE INVENTION
Integrated circuits commonly use programmable elements such as fusible links to allow custom programming of the integrated circuits after fabrication. While fusible links can be used for a variety of applications, they can be particularly useful in replacing defective circuits with redundant circuits. For example, integrated circuit memories are often fabricated with redundant memory cells. These memory cells can be selectively enabled after fabrication to replace defective memory cells which are detected during test operations.
One type of fusible link which could be used is a standard polysilicon fuse. The fuse comprises a polysilicon conductor approximately 0.5 &mgr; thick which is fabricated on the integrated circuit such that in its normal state there is a complete electrical path through the fuse. To program the fuse, a high power laser is used to open the electrical path by evaporating a portion of the polysilicon. While effective, the use of polysilicon fuses is limited by physical size requirements. That is, the fuses must be spaced so that neighboring fuses are not damaged when a fuse is opened using a laser. As integrated circuits continue to be fabricated with high density circuitry, the need for more fusible links also increases. The physical spacing requirements of laser fuses, therefore, prohibits their effective use in these high density circuits. Further, polysilicon laser fuses cannot be programmed once the integrated circuit is packaged, or encapsulated in any manner.
Another type of fusible link which has been used in integrated circuits is an anti-fuse. The anti-fuse is electrically opposite of the fuse in that the anti-fuse is a normally open circuit. To program the anti-fuse, its connections are shorted together to form an electrical path through the anti-fuse. One type of anti-fuse which is commonly used in integrated circuits is an oxide-nitride-oxide(ONO)anti-fuse. A typical ONO anti-fuse has a layer of nitride sandwiched between two layers of oxide, where the bottom layer of oxide is in contact with polysilicon and the top layer of oxide is also in contact with polysilicon. The ONO sandwich is a dielectric such that the unprogrammed anti-fuse functions as a capacitor. To program the ONO anti-fuse, a large potential is applied across the dielectric such that the dielectric is ruptured and the two polysilicon layers are shorted together. Although ONO anti-fuses are currently used in DRAMs where they are part of the normal process flow, this may not be true for future DRAMs. Any extra step, such as constructing a capacitor/dielectric structure for use as an anti-fuse, is time consuming and expensive.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for both an anti-fuse which does not require nitride and a method of programming the anti-fuse which does not result in damage to surrounding circuitry.
SUMMARY OF THE INVENTION
The above mentioned problems with anti-fuses and other problems are addressed by the present invention and which will be understood by reading and studying the following specification. An anti-fuse is described which is fabricated with a layer of oxide and uses an external connection for programming.
In particular, the present invention described an anti-fuse fabricated in an integrated circuit device comprising first and second conductive plates, and a layer of oxide fabricated between the first and second conductive plates. Anti-fuse logic circuitry is connected to the first plate for selectively coupling the first plate to a program voltage level. A bias circuit is connected to the second plate for coupling the second plate to a bias voltage level. An external connection is connected to the second plate for coupling the second plate to a pre-determined external voltage level during anti-fuse programming.
In an alternate embodiment, an integrated circuit memory is described which comprises an anti-fuse having a layer of oxide fabricated between a polysilicon layer having a dopant polarity and a well formed in a substrate, the well having the same dopant polarity of the polysilicon layer. Program circuitry is connected to the polysilicon layer for providing a program voltage, and an external connection is coupled to the well for providing an external voltage to the well. A bias circuit is connected to the well for coupling the well to a bias voltage.
In yet another embodiment, a method of programming an integrated circuit anti-fuse is described. The anti-fuse comprises a layer of oxide fabricated between two conductive plates. The plates can be fabricated as a polysilicon layer and a well formed in a silicon substrate. The method comprises the steps of coupling the well to a pre-determined negative potential, providing a pre-determined positive potential using programming logic, coupling the polysilicon layer to the pre-determined positive potential, and creating a current path through the layer of oxide to electrically connect the polysilicon layer to the substrate.
Finally, another method of programming an integrated circuit anti-fuse is described. The anti-fuse comprises a layer of oxide fabricated between a polysilicon layer and a well formed in a silicon substrate. The method comprises the steps of coupling the well to a pre-determined positive potential, providing a pre-determined negative potential using programming logic, coupling the polysilicon layer to the pre-determined negative potential, and creating a current path through the layer of oxide to electrically connect the polysilicon layer to the substrate.
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Batra Shubneesh
Marr Kenneth W.
Micro)n Technology, Inc.
Nguyen Viet Q.
Schwegman Lundberg Woessner & Kluth P.A.
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