Defect induced buried oxide (DIBOX) for throughput SOI

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S348000, C257S349000, C257S350000, C257S351000, C257S352000, C257S353000, C257S354000, C257S355000

Reexamination Certificate

active

06259137

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to producing high throughput silicon on insulator (SOI) materials and, in particular, to a method of fabricating a defect induced buried oxide (DIBOX) region in a semiconductor substrate. The DIBOX region produced by the method of the present invention has improved structural and electrical qualities as compared with prior art BOX regions. Moreover, the method of the present invention produces BOX regions having a greater thickness than prior art methods. Hence, the method of the present invention saves implant time and ultimately SOI wafer cost.
BACKGROUND OF THE INVENTION
In semiconductor manufacturing, several processes have been developed to produce a SOI device having a thin buried oxide (BOX) region disposed therein. One such process used in the prior art to produce BOX regions is referred to as SIMOX (separation by implantation of oxygen). In this process, the BOX region is fabricated by first implanting oxygen using high ion doses (>4×10
17
cm
−2
) followed by annealing at high temperatures (>1300° C.) Despite the current advances made in this field most of the prior art SIMOX processes produce a BOX region which is electrically inferior to thermally created oxide regions. Moreover, prior art SIMOX processes often times create a BOX region which contains silicon islands buried within the BOX. Typically, BOX regions produced using prior art SIMOX processes have discrete regions of thicknesses of about 1000 Å or 2000 Å . These thicknesses are determined by the implanted oxygen dose which is in the range of about 4-5×10
17
cm
−2
for the 1000 Å thick BOX and about 8-10×10
17
cm
−2
for the 2000 Å thick BOX. Thinner continuous BOX regions cannot be obtained using prior art SIMOX processes. Moreover, the prior art use of high ion doses to create a BOX region in a semiconductor substrate is not economical and is usually four to six times the bulk-silicon cost. This high cost makes the use of prior art SOI materials undesirable.
In view of the drawbacks mentioned hereinabove concerning prior SIMOX processes of fabricating a BOX region in a semiconductor material, there remains a need for providing a new and improved method of creating a BOX region in SOI materials. Specifically, it would be desirable to provide a new method wherein a continuous BOX region could be created in a semiconductor substrate having a wide range of thicknesses.
SUMMARY
One object of the present invention is to provide a method of fabricating a semiconductor material containing a defect induced buried oxide (BOX) region therein.
Another object of the present invention is to provide a method whereby all of the aforementioned problems with prior art SIMOX processes have been overcome.
A further object of the present invention is to provide a method which allows for the fabrication of a continuous BOX region using oxygen doses of about 3×10
17
cm
−2
or less.
A still further object of the present invention is to provide a method which allows for the fabrication of a BOX region that exhibits high structural as well as electrical qualities.
A yet further object of the present invention is to provide a BOX region in a SOI material which has a greater range of thickness than BOX regions prepared using conventional methods.
These as well as other objects and advantages are achieved by the method of the present invention wherein a defect induced buried oxide region is formed in a semiconductor material using lower ion doses than heretofore reported in the prior art.
Specifically, the method of the present invention comprises the steps of:
(a) creating a stable buried damaged region in a semiconductor substrate;
(b) forming an amorphous layer adjacent to said stable buried damaged region;
(c) oxidizing the structure produced by step (b); and
(d) optionally, annealing the oxidized structure provided in step (c).
According to a preferred embodiment of the present invention, step (a) is carried out by implanting oxygen ions into a semiconductor substrate, which is either bare or contains a cap layer, e.g., a dielectric cap layer, using a low dose ion implantation step (on the order of 5×10
16
cm
−2
or greater) which is carried out at a high temperature of from about 200° C. or higher.
Step (b) of the present invention includes a yet lower ion dose implantation step using the same or different energy and ion as used in step (a). Step (b) of the present invention is carried out at about cryogenic temperatures to temperatures of about 300° C. or less. The ion dosage used in this step of the present invention is generally of from about 2×10
14
to about 4×10
15
cm
−2
.
This low temperature/low dose ion implantation step may be carried out in either a single step with a single temperature or multiple steps with multiple temperatures which range from about cryogenic to about 300° C. or less.
The oxidation step, step (c), is typically carried out in an inert ambient such as N
2
or Ar mixed with oxygen at temperatures of from about 1300° C. or higher. Under some circumstances, particularly when like ions are implanted in steps (a) and (b), this step causes the formation of a continuous BOX region.
The optional step of the present invention is an anneal step which is normally carried out in an ambient containing a mixture of an inert gas and oxygen at temperatures of about 1300° C. or higher for a period of time of about 5 to about 20 hours. The optional anneal step is carried when the foregoing oxidation step does not form a BOX region with desired structural and electrical properties. Normally, a BOX region is formed after oxidation when like ions, such as oxygen ions, are implanted in both steps (a) and (b).
The term “high structural quality” is used herein to denote a structure which has little or no etch pit density (less than 1×10
5
cm
−2
); little or no top or bottom Si/buried oxide roughness (less than 200 Å as observed by TEM spectroscopy); a low HF-defect density (less than 5 cm
−2
); a low surface roughness (5 Å root mean square(Rms)); and, if present, the silicon precipitates in the buried oxide region at a low density (less than 1×10
5
cm
−2
) and a small size (less than 500 Å in height). The structural quality can be determined using optical, atomic force scanning and/or transmission microscopy.
The term “high electrical quality” is used herein to denote a structure wherein the BOX breakdown field is high (greater than 5 megavolts per cm); the BOX minibreakdown voltage is high (greater than 30 volts); the BOX leakage at a given voltage is low (less than 1 nanoAmps); and the BOX defect density is low (less than 2 cm
−2
)
Another aspect of the present invention relates to a SOI material having a continuous BOX region formed in a semiconductor substrate by the method of the present invention. The BOX region formed by the instant invention has a variable, but controllable, continuous thickness which can typically range from about 800 to about 2000 Å by varying the first ion implantation step such that the base dose is from about 2×10
17
to about 6×10
17
cm
−2
. Such a controllable, continuous range of BOX thicknesses cannot be obtained utilizing prior art SIMOX processes.


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patent: 4786608 (1988-11-01), Griffith
patent: 4902642 (1990-02-01), Mao et al.
patent: 4975126 (1990-12-01), Margail et al.
patent: 5279978 (1994-01-01), See et al.
patent: 5288650 (1994-02-01), Sandow
patent: 5519336 (1996-05-01), Liu et al.
patent: 5589407 (1996-12-01), Meyappan et al.
patent: 6043166 (2000-03-01), Roitman et al.
patent: 63-217657 (1988-09-01), None
White A. E., et al.: “The role of implant temperature in the formation of thin buried oxide layers” Beam©Solid Interactions and Transient Processes Symposium, Boston, MA, USA, Dec. 1-4, 1986, pp. 585©590, XP000922701.
Stanley Wolf, “Silicon Processing for the VLSI Era”, vol. 2:

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