Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With particular semiconductor material
Reexamination Certificate
1994-02-22
2001-04-03
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
With particular semiconductor material
C257S102000, C372S045013
Reexamination Certificate
active
06211539
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to III-V materials and, in particular, to III-V semi-insulating materials.
2. Art Background
The III-V semiconductor materials such as gallium arsenide, indium phosphide, gallium indium phosphide, indium phosphide arsenide, and gallium indium arsenide phosphide are being utilized and/or have been investigated for various devices. In general, these devices such as laser devices or field effect transistors (FETs) are formed by a series of deposition processes resulting in a layered structure formed on an essentially single crystal substrate. Generally, a region is introduced within the structure to confine or restrict the flow of current to desired device paths, i.e., to device active regions. Various expedients such as a patterned oxide layer or a reverse biased p-n junction are employed for this isolation. However, the oxide layer does not permit epitaxial overgrowth. The p-n junction expedient which does allow overgrowth, nevertheless, yields a resistivity that is highly temperature dependent. Thus, research has been stimulated towards the development of a semi-insulating single crystalline region within the structure since the resistivity of such regions is not strongly temperature dependent and since subsequent overgrowth is possible. Semi-insulating material is generally formed by suitably doping the desired Ill-V semiconductor material. For example, in the formation of gallium arsenide based layers for FET applications, one method of forming a semi-insulating gallium arsenide region involves introducing chromium as a dopant. The chromium doped gallium arsenide layer is generally fabricated by chemical vapor deposition (CVD) growth in a gas transport system. In a typical procedure, a gallium arsenide wafer is heated and a deposition gas is prepared that includes gallium chloride and arsenic compounds such as As
2
and/or As
4
. These materials are transported in a hydrogen stream or in an inert gas stream, e.g., a helium stream. Upon contacting the heated substrate, gallium arsenide is deposited with the release of a chloride containing gas. The reactions involved are, thus, shown in the following equations.
GaCl
+
As
2
→
H
2
GaAs
+
HCl
or
GaCl
+
As
2
→
He
GaAs
+
Cl
2
.
An appropriate dopant precursor is introduced into the deposition gas stream to produce the desired semi-insulating properties. For example, a chromyl chloride dopant precursor as described in U.S. Pat. No. 4,204,893 issued May 27, 1980 is utilized for producing semi-insulating gallium arsenide. However, chromium compounds are not the only dopant precursors that have been suggested for doping gallium arsenide. Other dopant precursors such as iron pentacarbonyl for gallium arsenide doping have been disclosed. (See U.S. Pat. No. 3,492,175 issued Jan. 27, 1970.)
Indium phosphide has also been formed by a CVD process. In particular, a gas stream including volatile indium halide entities such as InCl, InC
2
, and In
2
Cl
3
and phosphorus containing entities such as PH
3
, P
2
and P
4
are utilized in a hydrogen atmosphere to form indium phosphide and HCl as shown in the following equation.
H
2
+
InCl
InCl
2
In
2
Cl
3
]
+
PH
3
P
2
P
4
]
→
InP
+
HCl
Unlike gallium arsenide deposition, an inert gas carrier system such as a helium carrier system does not result in the deposition of indium phosphide. Since a reducing carrier e.g., a hydrogen carrier, is necessary in conventional CVD of indium phosphide, the dopant precursor employed has been limited to those that do not undergo reduction to produce elemental metals of low volatility. (Premature reduction to a nonvolatile elemental metal by interaction with the carrier gas does not result in dopant incorporation, but instead induces essentially complete depletion of the dopant by formation of the metal on the reactor walls or in the gas phase.) Therefore, only chromium-based dopant precursors have been utilized to form semi-insulating indium phosphide. (See Alferov et al,
Soviet Technical Physics Letters,
8(6), 296 (1982) and L. A. Ivanyutin and I. N. Tsypleiko,
Elektronnaya Tekhnika,
No. 6, 155, 20 (1981). However, as disclosed by Alferov et al. supra chromium-doped indium phosphide epitaxial layers having resistivities of only approximately 5×10
3
ohm-cm have been produced. This resistivity level is marginally acceptable for discrete devices such as lasers. However, for arrays of lasers or for integrated circuits, it is highly desirable to have a material with a significantly higher resistivity —a resistivity greater than 10
6
ohm-cm—to avoid, for example, electrical leakage and undesirable cross coupling of elements in an integrated circuit. Thus, production of suitable resistivities for indium phosphide has not been attained with conventional systems despite the success of these systems for gallium arsenide.
SUMMARY OF THE INVENTION
Indium phosphide having a resistivity up to 1×10
9
ohm-cm has been produced utilizing a metal organic chemical vapor deposition (MOCVD) procedure in conjunction with an iron pentacarbonyl or ferrocene based dopant precursor. The use of an iron pentacarbonyl or ferrocene based dopant precursor in the formation of indium phosphide through MOCVD results in device quality semi-insulating layers and avoids significant loss of dopant through premature deposition of elemental iron. For example, excellent results are achieved by employing these dopant precursors in conjunction with indium-organic materials such as alkyl indium-alkyl phosphine adducts, e.g., trimethyl indium-trimethyl phosphine adduct, together with additional phosphine. Once the device semi-insulating layers are formed, the device active regions are produced by conventional techniques.
REFERENCES:
patent: H291 (1987-06-01), Boos
patent: 4361887 (1982-11-01), Nakamura et al.
patent: 4593304 (1986-06-01), Slayman et al.
Johnston, Jr. Wilbur Dexter
Long Judith Ann
Botos Richard J.
Clark Sheila V.
Lucent Technologies - Inc.
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