Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
1998-10-28
2001-01-30
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S586000, C438S592000, C438S637000, C438S639000, C438S668000, C438S671000
Reexamination Certificate
active
06180500
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed generally to processes used in the manufacture of solid state electronic devices and, more particularly, to processes used in the manufacture of memory devices employing metal oxide semiconductor field effect transistors (MOSFETs).
2. Description of the Background
The fabrication of MOSFETs is itself a complex process. The fabrication of devices which employ MOSFETs is equally complex, if not more so. For example, fabrication of MOSFETs requires an understanding of crystal structures and the methodologies for adding and selectively removing material from a crystalline wafer. Material may be added by oxidation, diffusion, ion implantation, and chemical deposition to name a few techniques. Removal of material may be accomplished, for example, by ion etching, chemical etching, and plasma etching.
Putting all those various steps together to build a device which has hundreds of thousands of MOSFETs interconnected to form a complex device such as a Static Random Access Memory (SRAM) is a complicated matter. When designing a circuit, other considerations come into play such as heat dissipation, line capacitance, speed, etc. Also of primary importance is the particular technology chosen and its inherent limitations. For example, using photolithography places a lower limit of about 0.25 microns on the size of components or component parts.
The drive for ever more complicated devices has driven the size of individual components to the smallest size compatible with the technology used to produce the device. In some circumstances, planar space on chips has become so scarce that devices like capacitors are formed in trenches or stacked on top of other devices to save space. In any event, such small, closely packed devices must nevertheless each carry out the function for which they are fabricated in a manner that does not interfere with neighboring devices. To permit that, sometimes components, component parts, or spacing between components are made larger than the smallest dimension permitted by the fabrication technology to insure proper operation.
Other considerations in the fabrication of complicated devices such as SRAMs are the number of masks needed to fabricate the device and the number of process steps required. It may be that a desirable geometry simply requires too many additional process steps or the creation of one or more additional masks such that the advantage gained by the desirable geometry is more than offset by the inefficiencies encountered in its production. It thus becomes a very difficult engineering problem to design desirable geometries that satisfy all the requirements demanded of the finished device and which can be produced economically by commercially available processes.
One example of this type of engineering problem can be seen in the design and fabrication of nibble structures. A nibble structure is that portion of a poly gate which extends past the active area and over a portion of the field oxide. It is desirable to have the poly gate extend past the active area to ensure good overlap onto the active area, but not too far over the field oxide so as not to interfere with a neighboring poly gate. Current practice dictates making the nibble structure larger than a minimum size to insure that rounding off that occurs during the creation of openings in the poly layer does not make the nibble structure too small. Also, typical commercially available photolithography techniques require that the openings between poly gates be a minimum of 0.25 microns. It is thus necessary to increase the spacing between devices to insure that when the opening is made, and rounding off occurs, the resulting nibble structure is not too small. It would be advantageous to create nibble structures and poly gate spacings that are as small as possible, and to do so without requiring the use of additional masks and associated process steps.
SUMMARY OF THE INVENTION
The present invention is directed to creating ultra-small nibble structures using a modification of an already existing mask. The method is comprised of the steps of depositing a layer of nitride on a circuit being fabricated according to standard MOSFET process steps. A layer of photoresist is patterned using a modification of an existing mask such as a contact mask modified to include a nibble pattern. The nitride layer and an underlying oxide layer are removed according to the patterned photoresist to create a contact opening and an opening over the field oxide. Spacers may be created in the opening over the field oxide. A conductive layer and a polysilicon layer exposed in the opening over the field oxide are removed extending the opening down to the field oxide to create a nibble structure in the polysilicon layer.
Use of the spacer in the opening over the field oxide permits the poly to poly spacing above the field oxide to be approximately 0.15 microns. Use of the spacers also eliminates rounding of the poly gate. That allows the nibble structure to be designed ultra-small because the process will not result in the structure being fabricated smaller than designed. The opening over the field oxide is created using a modification of an existing mask, for example a contact mask, so that no additional mask step is required. That allows a desirable geometry to be fabricated without uneconomical modifications of existing fabrication processes. Those advantages and benefits of the present invention, and others, will become apparent from the Description of the Preferred Embodiments hereinbelow.
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Gonzalez Fernando
Violette Michael P.
Gurley Lynne A.
Micro)n Technology, Inc.
Thorp Reed & Armstrong
Tsai Jey
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