Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board
Reexamination Certificate
1999-05-24
2001-05-08
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
On insulating carrier other than a printed circuit board
C257S678000, C257S698000, C257S702000, C257S723000, C257S725000, C257S744000
Reexamination Certificate
active
06229203
ABSTRACT:
BACKGROUND OF THE INVENTION
Wire bonding techniques for interconnecting high temperature die materials such as silicon carbide can be unreliable because the mechanical joints of wire bonds are not designed for use in temperatures exceeding about 150° C. and tend to degrade at temperatures above 200° C.
Another limitation of wire bonding is the fact that high temperature metals such as molybdenum are not compatible with conventional wire bonding. Aluminum has been added to the molybdenum in an attempt to create a wire bondable region, but the bonds remain unreliable at high temperatures.
In one form of high density interconnect (HDI) circuit module, an adhesive-coated polymer film overlay having via openings covers a substrate which can support integrated circuit chips in chip wells. The polymer film provides an insulated layer upon which is deposited a metallization pattern for interconnection of substrate metallization and/or individual circuit chips through the vias. Methods for performing an HDI process using overlays are further described in Eichelberger et al., U.S. Pat. No. 4,783,695, issued Nov. 8, 1988, and in Eichelberger et al., U.S. Pat. No. 4,933,042, issued Jun. 12, 1990. Generally a plurality of polymer film overlays and metallization patterns are used.
This type of HDI circuit module provides efficient use of space and flexibility of interconnection patterns. However, most polymers are not capable of withstanding sustained high temperatures such as 300° C. and above without severe degradation.
SUMMARY OF THE INVENTION
It would be advantageous to have a fabrication process that both interconnects semiconductor die efficiently and is capable of withstanding continuous high temperature environments. In the present invention, a temporary laminate structure with a removable polymer layer is used to facilitate deposition of metallization patterns, and the polymer layer is later removed (dissolved or otherwise etched away). The present invention is especially useful with semiconductor die comprising materials such as silicon carbide, for example, which are able to withstand high temperatures.
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Agosti Ann M.
Breedlove Jill M.
General Electric Company
Keshavan Belur
Smith Matthew
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