Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-10-07
2001-04-17
Abraham, Fetsum (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S316000, C257S338000, C257S351000, C257S369000, C257S357000
Reexamination Certificate
active
06218703
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to semiconductor devices with improved switching accuracy and operational speeds at reduced power consumption levels. More particularly, the present invention relates to MOS semiconductor devices and circuits having control electrodes that improve the switching accuracy and speed of the devices and circuits while reducing the power consumption thereof, and while permitting fabrication using standard MOS fabrication techniques and equipment.
2. Description of the Related Art
In recent years, large scale integration technology has steadily improved so that more complex integrated circuits can be fabricated. However, limitations in current VLSI technology preclude reliable use of such technology in high speed circuit applications. Attempts to overcome these limitations have involved the controlling of the switching threshold voltage and resulted in the use of functional semiconductor devices such as neuron MOS (vMOS) transistors and circuits (e.g., EEPROMs) fabricated using conventional silicon process technology. The vMOS transistor is a MOS transistor having a feature wherein a single vMOS element has capabilities similar to that of a neuron.
FIG. 24
illustrates a vMOS transistor structure. The vMOS transistor includes a source electrode region
55
and a drain electrode region
56
formed by doping an impurity into a semiconductor substrate
57
to a high-concentration level. A gate insulating film
50
, a floating gate
48
, and a gate insulating film
51
are formed successively on the semiconductor substrate
57
, and a plurality of signal input gates
45
and
46
are formed on the gate insulating film
51
. The floating gate
48
is surrounded by the gate insulating films
50
and
51
, and the signal input gates
45
and
46
are capacitively coupled with the floating gate
48
. The gate voltage of the floating gate
48
is given as a weighted linear addition of the signal voltages applied to the signal input gates
45
and
46
. The signal input gate
45
is capacitively coupled with the floating gate
48
via a capacitor C, created across the gate insulating film
51
, and the signal input gate
46
is capacitively coupled with the floating gate
48
via a capacitor C
2
created across gate insulating film
51
. If the voltages applied to the signal input gates
45
and
46
are represented by V
g1
and V
g2
, respectively, the voltage (&phgr;
F
) on the floating gate
48
can be written as &phgr;
F
=(C
1
V
g1
+C
2
V
g2
)/(C
1
+C
2
). If the floating gate voltage &phgr;
F
is lower than a threshold voltage V
th
, the transistor is in an off-state, and if the floating gate voltage &phgr;
F
is greater than the threshold voltage V
th
the transistor is in an on-state. In
FIG. 28
, V
sub
, V
s
, V
d
denote a substrate voltage, source voltage, and drain voltage, respectively.
FIG. 25
represents a circuit diagram of a 2-input vMOS transistor having a structure similar to that shown in
FIG. 24
, and
FIG. 26
illustrates a graph of drain current vs. gate voltage for the 2-input vMOS transistor shown in FIG.
25
. For simplicity, it is assumed here that the capacitance of both C
1
and C
2
are 1 (unity). In this case, when (V
g1
+V
g2
)/2>V
th
, a current flows through the channel of the 2-input vMOS transistor. Therefore, if V
g1
and V
g2
are regarded as an input voltage and a control voltage, respectively, then the threshold voltage of the transistor seen by V
g1
is controlled by V
g2
. Although, the overall gate voltage required for the channel to be turned on is constant, the apparent threshold voltage seen at a signal input gate is changed by the voltage applied to the other signal input gate. Thus, the vMOS structure shown in
FIG. 24
can function as a variable threshold device. Discussions of current vMOS transistor technology can be found in “Nikkei Micro Devices” pp.101-109 (January 1992) and in a paper published in “Technical Report”, The Institute of Electronics, Information, and Communications Engineers, ICD93-6, by Shibata and Omi, pp.39-46.
The vMOS transistor structure can be used to construct semiconductor circuits having CMOS characteristics.
FIGS. 27
a
and
27
b
illustrate a functional layout of a semiconductor inverter having input gates
61
, a floating gate
62
and gate oxide films
63
and
64
that is fabricated using vMOS transistors and has CMOS operating characteristics.
FIG. 28
illustrates a circuit diagram of the CMOS-type inverter seen in
FIGS. 27
a
and
27
b.
The vMOS transistor structure can be used to construct an EEPROM semiconductor circuit. As seen in
FIG. 29
, the EEPROM includes a source electrode region
58
and a drain electrode region
59
that are formed in a semiconductor substrate
60
by diffusing an impurity to a high-concentration level. A gate insulating film
52
, a floating gate
49
, and a gate insulating film
53
are successively formed on the semiconductor substrate
60
, and a control gate
47
is formed on the gate insulating film
53
. The floating gate
49
is surrounded by the gate insulating films
52
and
53
, and the control gate
47
is capacitively coupled with the floating gate. The gate insulating film
52
has a portion
54
with a very thin thickness. Under a certain bias condition, the thin portion
54
acts as a tunnel oxide film so that a tunnel current flows between the drain electrode region
59
and the floating gate
49
through the thin portion
54
acting as a tunnel oxide film.
FIG. 30
illustrates a circuit diagram of the EEPROM shown in FIG.
29
. The floating gate
49
can be at either one of two different voltage levels depending on whether a charge is injected, through the tunneling effect, from the drain
59
into the floating gate
49
through the tunnel oxide film
54
. The difference in the floating gate voltage results in a difference in the threshold voltage seen by the control gate
47
. As a result, the voltage required for the control gate
47
to turn on the device so that a sufficiently large current flows through a surface region of the semiconductor substrate
60
between the source
58
and the drain
59
, can have either one of two different values.
Although the above described vMOS transistor is fabricated with substantially the same structure as conventional MOS devices in terms of the source electrode regions, the drain electrode regions, and the silicon substrates, the vMOS transistor differs from conventional MOS transistors in that their threshold voltages can be varied. The vMOS transistor can be used in the fabrication of various semiconductor circuits including memory circuits that have advantages over conventional MOS circuits. For example, such semiconductor circuits are fabricated from vMOS transistors having similar operating characteristics as CMOS circuits, and such semiconductor circuits can be fabricated using a substantially smaller number of vMOS transistors as compared to conventional MOS circuits.
However, one limitation of such vMOS based semiconductor circuits is that the threshold voltages of the vMOS transistors are determined by the capacitance between the floating gate and a plurality of input gates. As a result, the threshold voltage of each transistor is influenced by the dimensions (e.g., the area) of the gate electrode. However, inherent variations in the fabrication processes used to produce such vMOS based semiconductor circuits makes it difficult to adequately control the dimensions of the gate electrode. These inherent variations reduce the switching speed and accuracy of circuits fabricated from vMOS transistors. That is, the operational characteristics of such vMOS based circuits are directly determined by the accuracy of the microstructure fabrication process or microlithography technology. The inherent variations in the fabrication process are magnified with, for example, VLSI circuits where as the complexity of the circuit increases the number of vMOS transistors used also increases.
One reason for the inherent var
Abraham Fetsum
Cooper & Dunham LLP
Ricoh & Company, Ltd.
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