Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-10-20
2001-04-03
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000
Reexamination Certificate
active
06211062
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method, particularly to a method for manufacturing a semiconductor device having a multiple wiring layer and using hydrogen silsesquioxance (hereafter referred to as HSQ) as a interlayer insulating film.
2. Description of the Related Art
In accordance with miniaturization of recent years, the wiring pitch of semiconductor devices having a multiple wiring layer has been decreased. When a wiring pitch decreases, the distance between adjacent wirings decreases and the capacitance between adjacent wirings referred to as wiring capacitance increases. Thereby, operating speed is lowered and power consumption is increased. It is proposed for these problems to use a film having a low dielectric constant (low dielectric constant film) as an interlayer insulating film instead of a silicon oxide film having been used so far. By using the low dielectric constant film, it is possible to realize a small wiring capacitance even for a semiconductor device having a small wiring pitch.
Low dielectric constant films made of various materials are already researched and developed. Particularly, HSQ is one of the most-prospective low dielectric constant films because it has heat resistance for a temperature of 1,400° C. or higher.
A conventional semiconductor device manufacturing method using HSQ as a interlayer insulating film is described in, for example, T. Zoes, B. Ahlburn, K. Erz, and M. Marsden, “Planarization Performance of Flowable Oxide in the Sub 0.5 &mgr;m Regime,” Conference Proceedings ULSI XI 1996 Materials Research Society pp. 121-125 (1996).
A conventional semiconductor device manufacturing method same as the method described in the above document is described below by referring to
FIGS. 7A and 7B
and
FIGS. 8A and 8B
.
In
FIG. 7A
, on a first interlayer insulating film
1
made of BPSG (Boro-Phospho-Silicate Glass) film having a thickness of approx. 0.8 &mgr;m, a first refractory metal film
2
made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm, a first metal film
3
made of an AlCu film having a thickness of approx. 0.5 &mgr;m, and a first antireflection film
4
made of a titanium nitride film having a thickness of approx. 50 nm for preventing reflection in a photolithographic process are formed from the bottom in this order through the sputtering method. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a first wiring layer made of the first refractory metal film
2
, first metal film
3
, and first antireflection film
4
. Thereafter, a first plasma oxide film
5
having a thickness of approx. 50 nm is formed through the plasma CVD method using, for example, a mixed gas of SiH
4
and NH
3
. Further, HSQ is applied onto the first wiring layer so that the film thickness of HSQ reaches approx. 0.4 &mgr;m and then, baking is performed to form an HSQ film
6
as a interlayer insulating film. Furthermore, a second plasma oxide film
7
having a thickness of approx. 1.4 &mgr;m is formed on the HSQ film
6
using the plasma CVD method. At least either of chemical polishing and mechanical polishing is performed so that the sum of the thicknesses of the HSQ film
6
and the second plasma oxide film
7
reaches approx. 0.8 &mgr;m on the first wiring layer.
Then, as shown in
FIG. 7B
, a first via hole
8
is formed through a photolithographic process and reactive-ion etching. Then, a second refractory metal film
9
made up of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the first via hole
8
and on the second plasma oxide film
7
through the sputtering method. Moreover, tungsten is deposited to approx. 0.5 &mgr;m through the CVD method using WF
6
or the like as a source gas and thereafter, a first tungsten film
10
is left only in the via hole
8
by etching-back. Then, a second metal film
11
made of an AlCu film having a thickness of approx. 0.5 &mgr;m and a second antireflection film
12
made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface by the sputtering method. Furthermore, patterning is performed through a photolithographic process and reactive-ion etching to form a second wiring layer made of the second refractory metal film
9
, the second metal film
11
and the second antireflection film
12
.
Then, as shown in
FIG. 8A
, a third plasma oxide film
14
having a thickness of approx. 50 nm is formed through the plasma CVD method using, for example, a mixed gas of SiH
4
and Mn. Thereafter, an HSQ film
15
having a thickness of approx. 1.4 &mgr;m is formed by applying HSQ onto the second wiring layer and baking it. Moreover, a fourth plasma oxide film
16
having a thickness of approx. 1.4 &mgr;m is formed on the HSQ film
15
through the plasma CVD method. Then, at least either of chemical polishing and mechanical polishing is performed so that the sum of the thicknesses of the HSQ film
15
and fourth plasma oxide film
16
reaches approx. 0.8 &mgr;m on the second wiring layer. Then, a second via hole
17
is formed through a photolithographic process and reactive-ion etching. Then, a third refractory metal film
18
made of a titanium film having a thickness of approx. 30 nm and a titanium nitride film having a thickness of approx. 100 nm is formed in the second via hole
17
through the sputtering method. Moreover, tungsten is deposited to approx. 0.5 &mgr;m through the CVD method using WF
6
or the like as a source gas and thereafter, the tungsten is left only in the via hole
17
by etching-back to form a second tungsten film
100
. Then, a third metal film
19
made of an AlCu film having a thickness of approx. 0.5 &mgr;m and a third antireflection film
20
made of a titanium nitride film having a thickness of approx. 50 nm are formed on the entire surface through the sputtering method. Then, patterning is performed through a photolithographic process and reactive-ion etching to form a third wiring layer made up of the third refractory metal film
18
, the third metal film
19
, and the third antireflection film
20
.
Then, as shown in
FIG. 8B
, a cover film
22
made up of a plasma oxide film having a thickness of approx. 0.8 &mgr;m and a plasma SiON film having a thickness of approx. 0.3 &mgr;m is formed.
The above conventional manufacturing method has a problem that the dielectric constant of HSQ rises in the manufacturing process though an HSQ film serving as a low dielectric constant film is used as a interlayer insulating film and thus, the wiring capacitance increases.
That is, when high-temperature heat is applied to an HSQ film after it is formed, some of Si-H bonds are broken down and they are changed to, for example, Si-OH bonds. Therefore, the number of Si-H bonds in the HSQ film decreases and thereby, the dielectric constant of the HSQ film increases. It is estimated that in the above conventional method the breakdown of Si-H bonds occurs when the plasma oxide film is formed at a temperature of approx. 300 to 400° C. or the tungsten film is formed at a temperature of approx. 400 to 450° C. Particularly, the number of Si-H bonds is greatly decreased at 400° C. or higher. Therefore, the number of Si-H bonds is greatly decreased under formation of a tungsten film when the highest temperature is used in the process, and the process causes the wiring capacitance to greatly increase.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device having a small wiring capacitance even if a wiring pitch is small.
According to the present invention, a semiconductor device manufacturing method comprising the steps of forming a interlayer insulating film containing a hydrogen silsesquioxance (HSQ) film on the wiring layer, implanting hydrogen ions into the HSQ film, and annealing
Everhart Caridad
McGinn & Gibb PLLC
NEC Corporation
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