Semiconductor memory device including an SOI substrate

Details Semiconductor memory device including an SOI substrate Semiconductor memory device including an SOI substrate

1997-06-16

1998-10-20

Zarabian, Amir

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36523006, G11C 1604

Patent

active

058256962

ABSTRACT:
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor includes a source region, a drain region, and a body region located between the source region and the drain region. The body region of at least one N channel MOS transistor is electrically fixed. The body region of at least one P channel MOS transistor is rendered floating.

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