Method and apparatus for selectively varying error...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S769000, C714S774000

Reexamination Certificate

active

06219814

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a direct access storage device (DASD), and more particularly to method and apparatus for utilizing error correction code (ECC) in a direct access storage device (DASD).
DESCRIPTION OF THE PRIOR ART
Disk drive units incorporating stacked, commonly rotated rigid magnetic disks are used for storage of data in magnetic form on the disk surfaces. Data is recorded in radially spaced data information tracks arrayed on the surfaces of the disks. Transducer heads driven in a path toward and away from the drive axis write data to the disks and read data from the disks.
In direct access storage devices (DASDs), it is necessary to position the transducer heads over data tracks on the disk surfaces to properly record and retrieve data. Typically this is accomplished by providing servo information on one or more disk surfaces for reading by the transducer heads. In a fixed block architecture (FBA) each data information track is divided into a predetermined number of equal-sized sectors. Each data sector typically has an identification (ID) field associated with it. The ID field contains information which identifies the data sector, and other information, such as flags to indicate defective sectors. Typically an addressing scheme is used where the data sectors are identified to the host system by a logical block number (LBN). The host computer sends a list of logical block numbers to be written or read. The disk drive controller converts the LBNs into zone, cylinder, head and sector (ZCHS) values. The servo system seeks to the desired zone, cylinder and head, and the disk drive begins reading ID fields until a match is found. Once the appropriate ID field has been read, the disk drive then reads or writes the following data field.
The assignee of the present application has provided a sector format that eliminates ID fields, referred to as the No-ID sector format. In the No-ID sector format, the servo system is used to locate physical sectors, and a defect map is stored in solid state random access memory (RAM) to identify logical sectors. The disk data controller converts logical block numbers to physical block numbers. The servo system is used to locate the physical sector, based upon knowledge of the track formats in each zone. This information includes the locations of any data field splits due to embedded servo, which are also stored in RAM. Both the header and data field split information are stored in RAM, not on the disk.
Well known in the art of disk drive design is the use of error correcting codes (ECC) on the fly (OTF) to correct read errors without suffering a performance degradation. There are conditions where the customer data read error rate is significantly degraded, in particular during settle. In past HDD designs reading during settle did degrade the ECC miscorrection rate OTF, but to a smaller degree. In the case of a read during settle, the read was started very early (i.e. very far from the track center line) for improved performance. Past designs required that a sector ID must be read successfully to insure that the read head was near on track so reading the customer data could be attempted with insignificant degradation in error rate. Today many drives do not employ sector ID's written prior to the customer data, however the early read after settle is still desirable for performance. Because of the NO ID formats the drive designers implementing the OTF ECC can no longer rely on good error rates at all times. In fact the normal on track error rates can be degraded as much as 5 or 6 orders of magnitude, making the possibility of miscorrecting data during settle operations very likely. A need exists to protect the customer from receiving the wrong data undetected, in all cases.
A need exists for an improved method and apparatus for utilizing error correction code (ECC) in a DASD.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an improved method and apparatus for effectively utilizing error correcting code (ECC) in a direct access storage device. Other objects are to provide such method and apparatus for effectively utilizing error correcting code (ECC) substantially without negative effects, and that overcome many of the disadvantages of prior art arrangements.
In brief, a method and apparatus are provided for utilizing error correction code (ECC) in a direct access storage device (DASD). A plurality of predetermined file conditions are identified. Each of the plurality of predetermined file conditions are related to a read data raw error rate. An ECC burst control is provided with an ECC engine for varying an ECC correction power of the ECC engine. The ECC correction power is selectively varied responsive to the identified predetermined file conditions.


REFERENCES:
patent: 4195320 (1980-03-01), Andresen
patent: 4456993 (1984-06-01), Taniguchi et al.
patent: 4493081 (1985-01-01), Schmidt
patent: 4706250 (1987-11-01), Patel
patent: 4833679 (1989-05-01), Anderson et al.
patent: 4916701 (1990-04-01), Eggenberger et al.
patent: 4951284 (1990-08-01), Abdel-Ghaffar et al.
patent: 4993029 (1991-02-01), Galbraith et al.
patent: 5003542 (1991-03-01), Mashiko et al.
patent: 5233482 (1993-08-01), Galbraith et al.
patent: 5267241 (1993-11-01), Kowal
patent: 5321703 (1994-06-01), Weng
patent: 5384786 (1995-01-01), Dudley et al.
patent: 5390195 (1995-02-01), Brush
patent: 5404361 (1995-04-01), Casorso et al.
patent: 5416787 (1995-05-01), Kodama et al.
patent: 5432801 (1995-07-01), Hepler
patent: 5444719 (1995-08-01), Cox et al.
patent: 5446744 (1995-08-01), Nagasawa et al.
patent: 5455536 (1995-10-01), Kono et al.
patent: 5467361 (1995-11-01), Shipman, Jr.
patent: 5615190 (1997-03-01), Best et al.
patent: 5659557 (1997-08-01), Glover et al.
patent: 5737365 (1998-04-01), Gilbert et al.
patent: 5745268 (1998-04-01), Eastvold et al.
patent: 5754563 (1998-05-01), White
patent: 5768044 (1998-06-01), Hetzler et al.
patent: 5781565 (1998-07-01), Sako et al.
patent: 6038679 (2000-03-01), Hanson
patent: 6067203 (2000-05-01), Ottensen et al.
patent: 6125469 (2000-09-01), Zook et al.
patent: 0608637A1 (1994-08-01), None
patent: 0747818A1 (1996-12-01), None
Enhanced Addressing Error Detection System, J.M. Karp and S.C. West, IBM Technical Disclosure Bulletin, vol. 34, No. 7B, Dec. 1991, pp. 31-37.
Fully Self-Contained Memory Card Extended Error Checking/Correcting Hardware Implementation, D.L. Arlington, E.K. Evans, D.A. Kleinman, W.L. Mostowy, and A.F. Weaver, IBM Technical Disclosure Bulletin, vol. 31, No. 5, Oct. 1988, pp. 352-355.

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