Structure of capacitor for dynamic random access memory and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S308000, C257S309000, C257S310000, C257S381000, C257S385000, C257S488000, C438S240000, C438S254000, C438S397000

Reexamination Certificate

active

06246086

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a capacitor wherein a lower electrode made of conductive film opposes an upper electrode through a capacitive insulating film and is applied to a large capacity DRAM (Dynamic RAM).
2. Description of the Related Art
In the DRAM, a capacitor composing a memory cell must possess an electric storage capacity larger than a predetermined level in order to assure a predetermined or higher read-out voltage and refresh interval and prevent a soft error even if the memory cell area is reduced because of miniaturization and increased capacity.
Conventionally, to increase the electric storage capacity without increasing the area of the capacitor, the SiO film as the capacitive insulating film was thinned and if thinning of the SiO
2
film reached its limit, an ONO film having a higher dielectric constant than the SiO
2
film was utilized as the capacitive insulating film. Further, application of such high dielectric constant insulating films as a Ta
2
O
5
film, a BST film, an STO film or the like are considered.
As a concrete proposal for increasing the electric storage capacity without increasing a plane area of the capacitor, Mr. Youichi Miyasaka, Basic Research Center, NEC announced “A possibility of BST series thin film for DRAM” at ULSI high dielectric constant thin film technology forum '95 (Feb. 3, 1995, Tokyo Garden Palace).
In the related arts, a first conventional example in which as shown in
FIG. 1
, the lower electrode was formed in a cylinder shape so that electricity was stored in its external side wall and internal side wall as well and a second conventional example in which as shown in
FIGS. 2
a
and
2
b,
the lower electrode was formed in double cylinder shape so as to allow storage of electricity on a wider side wall are considered.
Assume that the external dimensions of the lower electrode in the first conventional example shown in
FIG. 1
are L, W, and H and the thickness of the conductive film forming the lower electrode is d, internal dimensions L
1
, W
1
, H
1
are as follows:
L
1
=L−
2
d, W
1
=W−
2
d, H
1
=H−d.
Thus, the surface area S of the lower electrode in the first conventional example is;
S=
2
H
(
L+W
)+2
H
1
(
L
1
+W
1
)+
LW
Assuming that the dimensions of respective parts of the lower electrode in the second conventional example shown in
FIGS. 2
a
and
2
b
are as shown in Figure, following can be obtained.
L
1
=L−
2
d, W
1
=W−
2
d, H
1
=H−d
L
2
=L−
4
d, W
2
=W−
4
d, H
2
=H−
2
d
L
3
=L−
6
d, W
3
=W−
6
d
Thus, the surface area S of the lower electrode in the second conventional example is;

S=
2
H
(
L+W
)+2
H
1
(
L
1
+W
1
)+
LW+
2
H
1
(
L
2
+W
2
)+2
H
2
(
L
2
+W
3
)
This is larger than the first conventional example by only last two terms, thus it is more advantageous for increasing the electric storage capacity.
However if the memory cell area is reduced because of miniaturization and increased capacity of the DRAM so that the plane area of the lower electrode of the capacitor is also reduced, in the second conventional example shown in
FIGS. 7
a
and
7
b,
a smaller one of L
3
and W
3
becomes 0. Consequently, a cylinder inside is crushed, so that a double cylinder type cannot be realized. Thus in such a case, conventionally, the first conventional example shown in
FIG. 1
was utilized.
OBJECT AND SUMMARY OF THE INVENTION
As evident from the above description, in the first conventional example in which the lower electrode is a single cylinder type, the electric storage capacity is difficult to increase and in the DRAM using the first conventional example, it is difficult to improve the reliability and reduce production cost.
Accordingly, according to claim
1
of the present invention, there is provided a capacitor wherein a lower electrode made of conductive film opposes an upper electrode through a capacitive insulating film characterized in that a pillar shaped second conductive film is disposed coaxially in a cylindrical first conductive film.
According to claim
2
of the present invention, there is provided a capacitor characterized in that the capacitor is a component of a memory cell and the lower electrode is a storage node electrode of the memory cell.
Because in the capacitor of the present invention, its second conductive film is not a cylinder but pillar, even if the plane area of the lower electrode is so small that double cylinders cannot be realized, a second pillar shaped conductive film can be disposed within the first cylindrical conductive film. Thus, even if the plane area of the lower electrode is so small that the double cylinders cannot be realized, opposing area of the lower electrode and upper electrode is larger as compared to the structure in which the lower electrode is of single cylinder type. Thus, if the plane area of the capacitor is the same, the electric storage capacity can be increased and if the electric storage capacity is the same, the capacitor can be miniaturized.


REFERENCES:
patent: 5236855 (1993-08-01), Dennison et al.
patent: 5281549 (1994-01-01), Fazan et al.
patent: 5492850 (1996-02-01), Ryou
patent: 5550076 (1996-08-01), Chen
patent: 5621606 (1997-04-01), Hwang
patent: 5688726 (1997-11-01), Kim
patent: 5702989 (1997-12-01), Wang et al.
patent: 5770510 (1998-06-01), Lin et al.
patent: 5847423 (1998-12-01), Yamamichi
patent: 5856220 (1999-01-01), Wang et al.
patent: 405021744 (1993-01-01), None
patent: 40530422 (1993-11-01), None
Stacked Capacitor DRAM with vertical fins (VF-STC), IBM Technical Disclosure Bulletin, vol. 33 No. 2, Jul. 1990.

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