High speed image drawing apparatus for displaying three...

Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller

Reexamination Certificate

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Details

C345S422000, C345S443000, C345S539000

Reexamination Certificate

active

06275241

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention concerns an image drawing apparatus that can perform three-dimensional drawing on a display screen of a display apparatus.
2. Description of the Related Art
FIG. 12
is a block diagram representing an example configuration of a conventional image drawing apparatus. This image drawing apparatus comprises: a CRT
10
for displaying images; a frame buffer
12
for storing display data corresponding to the display screen of the CRT
10
; a two-dimensional drawing circuit
14
for drawing desired rectangular images, etc., to the frame buffer
12
; a Z buffer
16
for storing depth data (Z values) for performing three-dimensional drawing to the frame buffer
12
; a three-dimensional straight line drawing circuit
18
for performing three-dimensional drawing to the frame buffer
12
based on the depth data stored in the Z buffer
16
; a Z buffer setting circuit
20
for setting desired rectangular area data, etc., in the Z buffer
16
; a processor
22
for performing overall control of the image drawing apparatus; and a main memory
24
for providing the processor
22
with a control program and work area.
In the configuration described above, the processor
22
first produces two-dimensional data in the main memory
24
. These two-dimensional data may be configured of line segments (straight lines), for example. By writing these to the frame buffer
12
, images are displayed on the CRT
10
.
The two-dimensional drawing circuit
14
is a dedicated circuit for writing certain two-dimensional images to the frame buffer
12
at high speed. More specifically, there are present a dedicated circuit for drawing two-dimensional straight lines, a dedicated circuit for filling in two-dimensional rectangular areas, and a dedicated circuit for transferring a two-dimensional rectangular area to another position.
With this two-dimensional drawing circuit
14
, high-speed drawing is effected by regular coordinate operation actions responsive to the attributes of the two-dimensional images being drawn. This is effected by setting addresses for specifying the shapes and positions of two-dimensional images such as noted above, and, in conjunction therewith, setting drawing color data, etc. Next, three-dimensional drawing is performed using the Z buffer
16
and the three-dimensional straight line drawing circuit
18
. The Z buffer stores depth data (Z values) contained in pixels (XY coordinates) drawn in the frame buffer
12
.
The three-dimensional straight line drawing circuit
18
compares depth data (source Z values) for each point in the XY coordinates of three-dimensional straight lines input from the processor
22
against the depth data (destination Z values) stored beforehand in the Z buffer
16
, selects the data having the smaller depth, and writes the data to the frame buffer
12
.
Thus it is possible to draw natural images, even drawing three-dimensional images as two-dimensional images, by having objects in back hidden by objects in front.
FIG. 13
is a block diagram representing the configuration of the three-dimensional straight line drawing circuit
18
. This three-dimensional straight line drawing circuit
18
comprises: a register
102
for storing source Z values input from the processor
22
; a comparator
104
for comparing source Z values stored in the register
102
against destination Z values stored in the Z buffer
16
; a raster operation processor (ROP) circuit
106
for performing logical operations on the source values and on the data present originally in the frame buffer
12
using AND, OR, XOR, or other logic circuits; a straight line operation circuit
108
for drawing straight lines to the frame buffer
12
by providing coordinate parameters for the start point and end point of straight lines to be drawn; a transfer circuit
110
for rewriting the Z buffer
16
based on the results of comparator
104
operations; a frame buffer address operation circuit
112
for generating and controlling addresses for accessing the frame buffer
12
; and a Z buffer address operation circuit for generating and controlling addresses for accessing the Z buffer
16
.
FIG. 14
is an explanatory diagram for describing the Z buffer operation processing for drawing any vector (straight line). When a straight line is drawn from coordinates (Xs, Ys) to coordinates (Xe, Ye), coordinates and Z values are calculated for the pixels that constitute the straight line.
The Z value calculation operations are performed up to the final coordinates (Xe, Ye) for each pixel configuring the straight line, based on the value (Zs=initial value) in the starting point coordinates (Xs, Ys) and the increase (Zi) between each pixel. The Z value computed in this way is compared with the Z value of the pixel originally at those coordinates by the comparator
104
. If the newly computed Z value is smaller, the results of that computation are written to the Z buffer
16
, writing the pixel to the frame buffer
12
is enabled, and a pixel is written based on the new drawing. If the newly computed Z value is larger, the Z buffer
16
and the frame memory
12
are kept the same (that is, the pixel there originally is retained).
There are also systems wherein such control is effected with software instead of with hardware in the form of the three-dimensional straight line drawing circuit
18
.
There are also the following methods of setting the value of the Z buffer
16
in such an image drawing apparatus.
(1) The method of setting Z values one at a time by directly accessing the Z buffer
16
by the processor
22
, and computing in the processor
22
the addresses where the Z values are set.
(2) The method of setting Z values in the Z buffer
16
using the three-dimensional straight line drawing circuit
18
described above.
(3) The method of setting Z values using the Z buffer setting circuit
20
.
Of these, with the method of setting the Z values directly by the processor
22
, Z values are set one at a time at points in the area established. This not only makes high-speed processing very difficult, but also puts a large burden on the processor
22
that controls the whole system.
With the method of setting Z values in the Z buffer
16
using the three-dimensional straight line drawing circuit
18
, it is possible to establish the desired area by drawing one line at a time, designating a start point and end point, as described in the foregoing, for each line segment making up the scan lines in the area established. Thus, as compared to the method of direct setting with the processor
22
, also described above, high-speed processing can be performed, especially for graphics of comparatively simple shape.
With this method, however, many line segments are designated in performing the drawing processing, and the process of comparing the Z value of each point is also contained, making it slower than the method in which the Z buffer setting circuit
20
is used. With the method wherein Z values are set using the Z buffer setting circuit
20
, it is possible to set Z values at higher speed than when using the three-dimensional straight line drawing circuit
18
.
More specifically, the Z buffer setting circuit
20
is a dedicated circuit for writing specific two-dimensional images to the Z buffer
16
at high speed. By designating two-dimensional areas inside the Z buffer
16
, and also designating Z values to be set, high-speed setting is achieved by regular coordinate operation actions that are responsive to the attributes of the two-dimensional areas in which Z values are set.
It is also possible, using such a Z buffer setting circuit
20
, to conduct high-speed actions to transfer a specific area in the Z buffer
16
to another area.
However, in order to perform high-speed settings and transfers to the Z buffer
16
in the conventional image drawing apparatus described above, a dedicated Z buffer setting circuit
20
must be provided, resulting in a configuration that is expensive and, hence, problematic.
Now, the two-dimensional drawing circuit

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