CVD Tin Barrier process with improved contact resistance

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S644000, C438S654000

Reexamination Certificate

active

06211072

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor fabrication, and more particularly to a method of fabricating a titanium nitride layer on an underlying structure.
2. Description of the Related Art
The fabrication of multi-level metallization structures in integrated circuit processing involves the alternating and sequential fabrication of various metal and interlevel dielectric layers. Interconnections between adjacent metal layers are ordinarily established by means of a plurality of contacts or local interconnects extending through the interlevel dielectric layer that separates the metal layers. A conventional method frequently employed to form local interconnect structures involves a process in which a passivation layer of dielectric material, such as a silicon dioxide or tetra-ethyl-ortho-silicate (“TEOS”) is blanket deposited. The interlevel dielectric layer is then lithographically patterned and etched to form vias where the contact structures will be deposited. The conducting material is next deposited in the vias, either concurrently with or prior to a later process step to form the next metal layer.
Early semiconductor fabrication processes utilized sputter deposited aluminum in conjunction with either straight or sloped sidewall vias. Straight sidewall vias required less substrate area than sloped sidewall vias and were often easier to produce using dry etching than sloped sidewalls. However, when physical vapor deposition is used to deposit metal over the vias, straight sidewalls can result in worse step coverage by the metal film than if the sidewalls were sloped.
Several methods have been developed to improve the step coverage of sputtered metal films. The first method involves the optimization of the deposition conditions by increasing the surface-migration ability of the atoms that have already arrived on the surfaces of the via. An example of this optimization involves the heating of the substrate during deposition and/or the bombardment of the substrate by ions through bias sputtering. Another technique for improving step coverage has been to maintain the aspect ratios of the vias below limits where step coverage falls off sharply.
Although sloped vias and attempted optimization of sputter conditions improved step coverage in some circumstances, the extra area needed to accommodate sloped vias severely limited the maximum packing density for a given substrate, particularly in processing at sub-micron levels. Furthermore, even with various techniques for optimizing the physical vapor deposition of metals, difficulties with contact resistance due to native oxides and inadequate step coverage rendered conventional physical vapor deposition metal via filling inadequate for some processes.
A more recent innovation in contact formation involves the fabrication of straight walled vias followed by complete fill with metal. Among various metals, tungsten has been frequently used to fill straight walled vias. In a typical process, tungsten is deposited by blanket chemical vapor deposition (“CVD”) and then planarized back to the upper surface of the interlevel dielectric layer by etching or chemical mechanical polishing. Prior to the blanket CVD of tungsten, an adhesion layer is deposited on the substrate surface and in the vias. The adhesion layer is a necessary precursor to the blanket CVD of tungsten due to the extremely poor adhesion of CVD tungsten on typical interlevel dielectric materials, such as thermal and plasma enhanced oxides, silicon nitride, TEOS and boro-phospho-silicate-glass (“BPSG”). Some examples of typical adhesion layer materials include TiN and/or Ti/TiN. These materials generally adhere well to the aforementioned insulator materials, and tungsten, in turn, typically adheres well to these types of adhesion layer materials.
A disadvantage associated with conventional fabrication of TiN adhesion layers is the potential for high and unpredictably variable contact resistance of the finished tungsten contact following fabrication. In many conventional processes, TiN is deposited by decomposing an organo-metallic compound of titanium in a processing chamber. The decomposition process leaves a film that is composed primarily of titanium carbo nitride, but also includes amounts of titanium-carbon-oxygen-nitrogen compounds, pure TiN, and diffused carbon and oxygen. The carbon is a byproduct of the organo-metallic titanium compound. The incorporation of oxygen is an unwanted result of residual oxygen that is almost always present in the processing chamber. By themselves, these carbon and oxygen impurities increase the resistivity of the adhesion layer. Perhaps more significantly, the carbon and oxygen impurities may react with the byproducts of the tungsten plug CVD process. Most tungsten deposition processes utilize the reduction of tungsten/fluorine (WF
6
) or tungsten/chlorine (WCl
6
) compounds by silane or another type of reducing agent. The byproducts of the silane reduction may react with the carbon and oxygen impurities in the TiN layer, resulting in the localized formation of nucleated insulating structures. These unwanted insulating structures, such as SiO
2
or SiC, may adversely impact the contact resistance and subsequence film stack resistivity of the contact.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of fabricating a conducting layer on a structure is provided. Tetrakis-dimethyl-amino-titanium vapor is decomposed in the presence of the structure to deposit a layer containing titanium nitride and a compound of titanium, nitrogen and carbon at a rate of about 9.4 to 10.6 Å/second and a thickness of less than about 105 Å. The deposited layer is exposed to a plasma ambient containing nitrogen and hydrogen to remove carbon and oxygen therefrom.
In accordance with another aspect of the present invention, a method of fabricating an adhesion layer in an opening of an insulating layer is provided. Tetrakis-dimethyl-amino-titanium vapor is decomposed in the presence of the opening to deposit a layer containing titanium nitride and a compound of titanium, nitrogen and carbon in the opening at a rate of about 9.4 to 10.6 Å/second and a thickness of less than about 105 Å. The deposited layer is exposed to a plasma ambient containing nitrogen and hydrogen to remove carbon and oxygen therefrom.
In accordance with another aspect of the present invention, a method of fabricating an ohmic contact in an opening of an insulating layer is provided. Tetrakis-dimethyl-amino-titanium vapor is decomposed in the presence of the opening to deposit a layer containing titanium nitride and a compound of titanium, nitrogen and carbon in the opening at a rate of about 9.4 to 10.6 Å/second and a thickness of less than about 105 Å. The deposited layer is exposed to a plasma ambient containing nitrogen and hydrogen to remove carbon and oxygen therefrom. A conducting material is deposited on the layer.


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patent: 5956613 (1999-09-01), Zhao et al.
patent: 5990004 (1999-11-01), Yang et al.
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patent: 6054382 (2000-04-01), Hsu et al.
patent: 6056999 (2000-05-01), Narasimhan
Stanley Wolf and Richard N. Tauber;Silicon Processing for the VLSI Era; vol. 1: Process Integration; pp. 399-405; 1986.
Stanley Wolf and Richard N. Tauber;Silicon Processing for the VLSI Era; vol. 3: Process Integration; pp. 244-248; 1990.

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