Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-06-25
2001-03-13
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S166000
Reexamination Certificate
active
06200837
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a thin film transistor, and more particularly to a method of manufacturing a thin film transistor using a polysilicon layer as a channel layer.
2. Description of the Related Art
In general, an active matrix type-liquid crystal display(AM-LCD) device is thin, so that it is often used in various display devices. In this AM-LCD device, one TFT is provided as a switching element for each pixel, so that individual pixel electrodes are independently driven.
In this display device, a glass substrate is used for a substrate material, for reducing cost. In this case, process must be performed at the low temperature of about 600° C., considering the softening temperature of the glass. Therefore, in case a polysilicon layer is used as a channel layer, an amorphous silicon layer is crystallized by a laser annealing capable of thermally treating at the low temperature of 600° C. or less, thereby forming the polysilicon layer. In this laser annealing, since fever is momently transmitted to the surface of the amorphous silicon layer, not to have on effect on the glass substrate, it is possible to crystallize the amorphous silicon layer without occurring the transformation of the substrate.
However, when crystallizing the amorphous silicon layer, a liquid state and a solid state coexist therein, so that the grain boundary of the polysilicon layer is projected due to the density difference of the two states, thereby generating hillock on the surface of the polysilicon layer. As a result, the surface of the polysilicon layer becomes rough, thereby deteriorating the properties of the TFT. For example, electric field is locally concentrated on the channel so layer of the TFT and leakage current occurs. Furthermore, the property of a gate insulating layer formed on the polysilicon layer is deteriorated. Accordingly, the reliability and the reproductivity are deteriorated.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to a method of manufacturing a TFT which can improve reliability by planarizing the surface of a polysilicon layer as a channel layer.
To accomplish this above object, according to the present invention, an amorphous silicon layer is formed on an insulating layer substrate and crystallized by excimer laser annealing process, to form a polysilicon layer. Next, the surface of the polysilicon layer is oxidized to form an oxide layer. At this time, the surface of the polysilicon under the oxide layer become smooth. Preferably, the oxide layer is formed by oxidation process using ECR(Electron Cyclon Resonator) plasma or using one selected from the group consisting of O
2
, O
2
N
2
, O
2
N
2
O, O
2
NH
3
and NO. Thereafter, the oxide layer is removed to expose the polysilicon layer and then a gate insulating layer is formed on the exposed polysilicon layer. Preferably, the gate insulating layer is formed to one selected from the group consisting of a SiO
2
layer, a SiN layer, a SiON layer and a TEOS oxide layer. The gate insulating layer is formed by ECR plasma oxidation process or ECR PECVD.
Additional object, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 5550070 (1996-08-01), Funai et al.
patent: 5616506 (1997-04-01), Takemura
patent: 5849612 (1998-12-01), Takahashi et al.
patent: 5869363 (1999-02-01), Yamazaki et al.
patent: 5985740 (1999-11-01), Yamazaki et al.
patent: 563196 (1993-03-01), None
patent: 645607 (1994-02-01), None
patent: 677484 (1994-03-01), None
patent: 6252405 (1994-09-01), None
patent: 7273347 (1995-10-01), None
patent: 883911 (1996-03-01), None
patent: 888172 (1996-04-01), None
patent: 8330597 (1996-12-01), None
patent: 9107107 (1997-04-01), None
patent: 10200120 (1998-07-01), None
patent: 10209460 (1998-08-01), None
Ihn Tae Hyung
Jeong Chang Yong
Lee Kyung Ha
Hyundai Electronics Industries Co,. Ltd.
Nelms David
Nhu David
Selitto & Associates, P.C.
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